IP Library Granted Patent US 8,484,838
Granted Patent B2
US 8,484,838 · App. 13/528,644 · Granted Jul 16, 2013

Method for constructing a capacitance sensing device

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Quick Facts
Patent No.
US 8,484,838
App. No.
13/528,644
Granted
Jul 16, 2013
Kind
B2
Abstract

Embodiments for constructing capacitance sensing devices include, but are not limited to, forming a plurality of electrodes on a central portion of a substrate, the substrate comprising a central portion and an outer portion, forming a first plurality of conductors on the substrate, each of the first plurality of conductors being connected to and extending from at least one of the plurality of electrodes, and forming an insulating material on the outer portion of the substrate and at least partially over some of the first plurality of conductors. The constructing also includes forming a second plurality of conductors on the insulating material, wherein the second plurality of conductors and the insulating material are configured such that each of the second plurality of conductors is electrically connected to at least some of the first plurality of conductors and is insulated from the others of the first plurality of conductors.

Claims (14)

1. A method for constructing a capacitance sensing device, the method comprising:

forming a plurality of electrodes substantially on a same plane and on a central portion of a substrate, the substrate comprising a central portion and an outer portion;

forming a first plurality of conductors on the substrate, each of the first plurality of conductors being connected to and extending from at least one of the plurality of electrodes, wherein ends of the first plurality of conductors extend into the outer portion of the substrate;

forming an insulating material on the outer portion of the substrate, wherein the insulating material covers the ends of the first plurality of conductors that extend into the outer portion of the substrate and the insulating material does not extend over the central portion of the substrate; and

forming a second plurality of conductors on the insulating material, wherein the second plurality of conductors and the insulating material are configured such that each of the second plurality of conductors is electrically connected to at least some of the first plurality of conductors and is insulated from the others of the first plurality of conductors.

2. The method of claim 1 , wherein the insulating material comprises a plurality of openings extending therethrough between one of the second plurality of conductors and one of the first plurality of conductors.

3. The method of claim 2 , further comprising forming a conductive member in each of the plurality of openings of the insulating material, the conductive member electrically interconnecting the one of the second plurality of conductors and the one of the first plurality of conductors.

4. The method of claim 3 , wherein the conductive members comprise carbon ink, silver ink, copper ink, indium tin oxide (ITO), or a combination thereof.

5. The method of claim 2 , wherein the forming the second plurality of conductors on the insulating material comprises filling the plurality of openings with a conductive material to electrically interconnect the one of the second plurality of conductors and the one of the first plurality of conductors.

6. The method of claim 1 , wherein the insulating material comprises a heat curing insulating material, an ultraviolet curing material, or a combination thereof.

7. The method of claim 1 wherein the insulating material comprises a resist ink, an acrylic resin, or a combination thereof.

8. The method of claim 1 , wherein the second plurality of conductors comprises silver, ITO, or a combination thereof.

9. The method of claim 1 , wherein the plurality of electrodes and the first plurality of conductors each comprise ITO, a silver nano-particle film, or a combination thereof.

10. The method of claim 1 , wherein the substrate comprises glass, polyethylene terephthalate (PET), or a combination thereof.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION
To: PARADE TECHNOLOGIES, LTD.
Reel/Frame 036508/0284 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS AND TRADEMARKS Recorded Aug 4, 2015
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT FOR THE SECURED PARTIES
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036264/0114 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
PATENT SECURITY AGREEMENT Recorded Nov 14, 2013
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 031636/0105 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2012
From: BADAYE, MASSOUD; VAVAROUTSOS, PETER; CAREY, JOHN; PRENDERGAST, PATRICK
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 028413/0635 →