IP Library Patent Application 13530019
Patent Application
App. No. 13/530,019

FLEXIBLE PORT BINDING FOR CONTROL PROCESSOR

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Quick Facts
Patent No.
US None
App. No.
13/530,019
Abstract

A method of flexibly binding physical network interface ports to a processor in a network testing system comprises generating an egress network packet with a prepend header at a processor, wherein the prepend header specifies a particular physical network interface through which the egress network packet should be transmitted, transmitting the prepended network packet to a configurable logic device (CLD), routing the prepended network packet to the specified physical network interface.

Claims (36)

1 . A method of flexibly binding physical network interface ports to a processor in a network testing system, comprising:

generating an egress network packet with a prepend header at a processor, wherein the prepend header specifies a particular physical network interface through which the egress network packet should be transmitted;

transmitting the prepended network packet to a configurable logic device (CLD);

routing the prepended network packet to the specified physical network interface.

2 . The method of claim 1 , further comprising:

routing the prepended network packet through a first routing CLD and a second routing CLD;

removing the prepend header; and

transmitting the network packet via the specified physical network interface.

3 . The method of claim 1 , further comprising:

routing the prepended network packet through the routing CLD to a second CLD;

at the second CLD, removing the prepend header and transmitting the network packet via the specified physical network.

4 . The method of claim 1 , further comprising:

defining a flow as all packets with a particular destination address and a particular destination port; and

assigning all egress packets in the flow the same physical network interface.

5 . The method of claim 1 , wherein the CLD is a field programmable gate array.

6 . The method of claim 1 , wherein the egress network packet is an Ethernet packet.

7 . A tangible, non-transitory computer-readable media comprising:

instructions that, when executed on a processor, enable the processor to perform the steps comprising:

generate an egress network packet with a prepend header at a processor, wherein the prepend header specifies a particular physical network interface through which the egress network packet should be transmitted; and

transmit the prepended network packet to a configurable logic device (CLD); and

a configuration file that when loaded by the CLD configures the CLD to route the prepended network packet to the specified physical network interface.

8 . The media of claim 7 , wherein the configuration file when loaded by the CLD further configures the CLD to route the prepended network packet to a second routing CLD prior to transmission via the specified physical network interface.

9 . The media of claim 7 , wherein the configuration file when loaded by the CLD further configures the CLD to route the prepended network packet to a second CLD, the media further comprising a second configuration file that when loaded by the second CLD configures the second CLD to remove the prepend header and transmit the network packet via the specified physical network.

10 . The media of claim 7 , wherein the instructions define a flow as all packets with a particular destination address and a particular destination port; and assign all egress packets in the flow the same physical network interface.

11 . The media of claim 7 , wherein the CLD is a field programmable gate array.

12 . The media of claim 7 , wherein the egress network packet is an Ethernet packet.

13 . A computing system comprising:

a processor programmed to perform the steps comprising:

generate an egress network packet with a prepend header at a processor, wherein the prepend header specifies a particular physical network interface through which the egress network packet should be transmitted; and

transmit the prepended network packet to a configurable logic device (CLD); and

the CLD configured to route the prepended network packet to the specified physical network interface.

14 . The system of claim 13 , wherein the CLD is further configured to route the prepended network packet to a second routing CLD prior to transmission via the specified physical network interface.

15 . The system of claim 13 , further comprising a second CLD, wherein the CLD is further configured to route the prepended network packet to the second CLD, and wherein the second CLD is configured to remove the prepend header and transmit the network packet via the specified physical network interface.

16 . The system of claim 13 , the processor is programmed to assign all egress packets a particular destination address and a particular destination port to the same physical network interface.

17 . The system of claim 13 , wherein the CLD is a field programmable gate array.

18 . The system of claim 13 , wherein the egress network packet is an Ethernet packet.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Apr 24, 2017
From: SILICON VALLEY BANK, AS SUCCESSOR ADMINISTRATIVE AGENT
To: BREAKINGPOINT SYSTEMS, INC.
Reel/Frame 042126/0181 →
SECURITY AGREEMENT Recorded Jan 25, 2013
From: BREAKINGPOINT SYSTEMS, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 029698/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2012
From: CANION, RODNEY S.; COOK, BRENT AARON; STROUD, JONATHAN; MORIARTY, MICHAEL
To: BREAKINGPOINT SYSTEMS, INC.
Reel/Frame 029416/0649 →