IP Library Granted Patent US 8,451,831
Granted Patent B2
US 8,451,831 · App. 13/542,932 · Granted May 28, 2013

System and method for implementing a multistage network using a two-dimensional array of tiles

Inventor: Puneet Khanduri (Redwood City, CA)
Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,451,831
App. No.
13/542,932
Granted
May 28, 2013
Kind
B2
Abstract

A network, including: a first tile having a processor, a first top brick connected to the processor, a first bottom brick, and a first intermediate brick; a second tile having a second intermediate brick and a second bottom brick; multiple connections connecting the first top brick with the second intermediate brick and the first intermediate brick with the second bottom brick using a passthrough on an intermediate tile between the first and second tiles, where the first, the intermediate, and the second tiles are positioned in a row; and a third tile having a plurality of caches connected to a third bottom brick, where the second and third tiles are positioned in a column, and the first bottom brick, the second bottom brick, and the third bottom brick belong to a bottom layer of the network, and where the first and second intermediate bricks belong to an intermediate layer of the network.

Claims (18)

1. A method for implementing a multistage network, comprising:

obtaining a design for the multistage network, wherein the multistage network comprises a top layer, a bottom layer, and an intermediate layer;

obtaining a plurality of tiles based on the design;

positioning a first tile, a second tile and a third tile of the plurality of tiles in a row based on the design, wherein the second tile comprises a passthrough;

positioning a fourth tile of the plurality of tiles in a column with the third tile;

implementing a plurality of switches on the plurality of tiles according to the design; and

connecting the third tile to the first tile using the passthrough of the second tile,

wherein each of the plurality of switches comprise a plurality of logical bricks corresponding to the top layer, the bottom layer, and the intermediate layer of the multistage network.

2. The method of claim 1 , wherein the plurality of tiles are chips in a multi-chip module (MCM).

3. The method of claim 1 , wherein implementing the plurality of switches comprises:

installing a full crossbar on at least one of the plurality of tiles, wherein the plurality of logical bricks collapse into the full crossbar.

4. The method of claim 1 , wherein implementing the plurality of switches comprises:

installing a partial crossbar on one of the plurality of tiles, wherein the plurality of logical bricks collapse into the partial crossbar.

5. The method of claim 1 , further comprising:

connecting the third tile and the fourth tile using proximity communication.

6. The method of claim 1 , wherein implementing the plurality of switches comprises:

programming a plurality of nodes based on a protocol of the design,

wherein the plurality of nodes are located on one of the plurality of tiles, and wherein each of the plurality of nodes corresponds to one of the plurality of logic bricks.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0195 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 1, 2013
From: KHANDURI, PUNEET
To: SUN MICROSYSTEMS, INC.
Reel/Frame 029909/0373 →
Continuity (2)
Division 12335226 · Dec 15, 2008
Related Publication 20120275341A1 · Nov 1, 2012