Granted Patent B2

US 9,076,678 · App. 13/545,698 · Granted Jul 7, 2015

Abstract

Claims (19)

1. A semiconductor device comprising a power supply, a first capacitor and a second capacitor, each of the first and second capacitors including first and second electrodes, the first electrode of the first capacitor and the first electrode of the second capacitor being connected in common and being supplied with a first voltage from the power supply, the second electrode of the first capacitor being supplied with a second voltage from the power supply, the second voltage being different from the first voltage, and the second electrode of the second capacitor being supplied with the first voltage.

2. The semiconductor device according to claim 1 , further comprising a third capacitor including a first electrode connected in common to the first electrodes of the first and second capacitors and applied with the first voltage, and a second electrode applied with a third voltage that is different from the first and second voltages.

3. The semiconductor device according to claim 1 , wherein the semiconductor device includes a memory array region having a plurality of memory cells and a peripheral region free from memory cells, and the first and second capacitors are provided in the peripheral region.

4. The semiconductor device according to claim 1 , wherein the first voltage is about a half of the second voltage.

5. The semiconductor device according to claim 2 , wherein the first voltage is about a half of the second voltage, and the third voltage is a ground voltage.

6. The semiconductor device according to claim 2 , further comprising a fourth capacitor including a first electrode connected in common to the first electrodes of the first, second and third capacitors and applied with the first voltage, and a second electrode applied with the first voltage.

7. A semiconductor device comprising:

a power supply;

a memory cell array region including a plurality of memory cells each of which includes a memory cell capacitor; and

a peripheral region including first and second compensation capacitors, each of the first and second compensation capacitors being the same in structure as the memory cell capacitor; wherein,

the first compensation capacitor includes first and second electrodes, the second compensation capacitor including third and fourth electrodes, the first electrode of the first compensation capacitor and the third and fourth electrodes of the second compensation capacitor are commonly supplied with a first voltage from the power supply, and the second electrode of the first compensation capacitor being supplied with a second voltage, which is different from the first voltage from the power supply.

8. The semiconductor device according to claim 7 , further comprising:

a first line connected to the first electrode of the first compensation capacitor and the third and fourth electrodes of the second compensation capacitor in common to supply the first voltage to the first, third and fourth electrodes; and

a second line connected to the second electrode of the first compensation capacitor to supply the second voltage to the second electrode.

9. The semiconductor device according to claim 7 , wherein the peripheral region further includes a third compensation capacitor which is the same in structure as the memory cell capacitor, and the third compensation capacitor including a fifth electrode supplied with the first voltage and a sixth electrode supplied with a third voltage which is different from the first and second voltages.

10. The semiconductor device according to claim 9 , further comprising:

a first line connected to the first electrode of the first compensation capacitor, the third and fourth electrodes of the second compensation capacitor and the fifth electrode of the third compensation capacitor in common to supply the first voltage to the first, third, fourth and fifth electrodes;

a second line connected to the second electrode of the first compensation capacitor to supply the second voltage to the second electrode; and

a third line connected to the sixth electrode of the third compensation capacitor to supply the third voltage to the sixth electrode.

Assignments (6)