Heterogeneous semiconductor photonic integrated circuit with multiple offset heights
Embodiments of the invention describe heterogeneous photonic integrated circuits (PIC) wherein a first silicon region is separated from the heterogeneous semiconductor material by a first distance, and a second silicon region is separated from the heterogeneous semiconductor material by a second distance greater than the first distance. Thus embodiments of the invention may be described as, in heterogeneous regions of a heterogeneous PIC, silicon waveguides using multiple heights of the silicon waveguide, or other structures with multiple offset heights between silicon and heterogeneous materials (as described herein).
1. An apparatus comprising:
a non-silicon slab;
a silicon semiconductor slab, having a first silicon region, and a second silicon region for exchanging light with the non-silicon slab; and
a cladding layer disposed between the non-silicon slab and the silicon semiconductor slab;
wherein a maximum height of the first silicon region is separated from the non-silicon slab by a first distance, and a maximum height of the second silicon region is separated from the non-silicon slab by a second distance greater than the first distance.
2. The apparatus of claim 1 , wherein, for one of the first or second silicon regions, the maximum height and a smaller height of the region forms a rib waveguide structure.
3. The apparatus of claim 1 , wherein, for one of the first or second silicon regions, the maximum height and a smaller height of the region forms a wire waveguide structure.
4. The apparatus of claim 1 , wherein the non-silicon material comprises III-V semiconductor material.
5. The apparatus of claim 1 , wherein the non-silicon material comprises magneto-optic material.
6. The apparatus of claim 1 , wherein the non-silicon material comprises crystal substrate material.
7. The apparatus of claim 1 , wherein the non-silicon material comprises a region directly contacting a region of the silicon semiconductor slab.
8. The apparatus of claim 1 , wherein the cladding layer separates the non-silicon slab and the silicon semiconductor slab such that no regions of the slabs directly contact each other.
9. The apparatus of claim 1 , further comprising:
an air gap between a waveguide of the silicon semiconductor slab and the non-silicon slab.
10. The apparatus of claim 1 , wherein non-silicon slab includes features of varying height to form at least one of the first and second distances separating the non-silicon slab and the silicon semiconductor slab.
11. The apparatus of claim 1 , wherein silicon semiconductor slab includes features of varying height to form at least one of the first and second distances separating the non-silicon slab and the silicon semiconductor slab.
12. The apparatus of claim 1 , wherein the cladding layer comprises silicon dioxide (SiO2).
13. The apparatus of claim 1 , wherein the cladding layer comprises chemical vapor deposition (CVD) diamond.
14. The apparatus of claim 1 , further comprising:
a taper included in the silicon semiconductor slab and having multiple heights for coupling a mode from a silicon waveguide to a waveguide in the non-silicon slab.
15. The apparatus of claim 14 , wherein the non-silicon slab further includes a taper to receive light from the taper included in the silicon semiconductor slab.
16. A system comprising:
a non-silicon region;
a first and a second silicon waveguide disposed below the non-silicon waveguide, the first and the second silicon waveguide separated from the non-silicon region by a first and a second separation distance, respectively, the first and the second separation distances to have different values; and
a cladding layer disposed between the non-silicon region and the silicon waveguides.
17. The system of claim 16 , wherein the first and second silicon waveguides comprise crossing optical paths, and the non-silicon region comprises a passive waveguide for one of the silicon waveguides.
18. The system of claim 16 , wherein the non-silicon region includes first and second photodetection regions disposed over the first and second silicon waveguides, respectively.