Electronic stimulator device pulse generator circuit
View Patent ↗An electronic stimulator device comprises a battery, first and second output ports, and an energy discharge circuit. The energy discharge circuit is coupled to the battery and configured to receive an electrical charge from the battery and deliver the electrical charge through an energy output port. A first switch is connected between the energy output and the first output port. A second switch is connected between the second output port and electrical ground. A third switch is connected between the second output port and the energy output. A fourth switch is connected between the first output port and electrical ground. A controller comprising a processor is configured to actuate the first, second, third and fourth switches between open and close states to deliver a biphasic current pulse between the first and second output ports.
1. An electronic stimulator device comprising:
a battery;
first and second output ports each configured to electrically couple to an electrode lead;
an energy discharge circuit coupled to the battery, the energy discharge circuit configured to receive an electrical charge from the battery and deliver the electrical charge through an energy output;
a first switch connected between the energy output and the first output port;
a second switch connected between the second output port and electrical ground;
a third switch connected between the second output port and the energy output;
a fourth switch connected between the first output port and electrical ground; and
a controller comprising a processor configured to actuate the first, second, third and fourth switches between open and closed states to deliver a biphasic current pulse between the first and second output ports.
2. The device of claim 1 , wherein:
the controller places the first and second switches in the closed state, and the third and fourth switches in the open state, wherein a first current pulse having a first polarity between the first and second output ports; and
the controller places the first and second switches in the open state, and the third and fourth switches in the closed state to deliver a second current pulse having a second polarity that is opposite the first polarity between the first and second output ports.
3. The device of claim 2 , wherein:
the controller places the second switch in the open state after a predetermined pulse width period to terminate the delivery of the first current pulse between the first and second output ports; and
the controller places the fourth switch in the open state after a predetermined pulse width period to terminate the delivery of the second current pulse between the first and second output ports.
4. The device of claim 3 , wherein the controller implements a first biphasic delay period after the delivery of the first current pulse between the first and second output ports, during which no current pulses are delivered between the first and second output ports and residual energy is dissipated through the fourth switch to electrical ground.
5. The device of claim 4 , wherein the first switch transitions from the closed state to the open state responsive to a control signal from the controller over a first portion of the first biphasic delay period, and the controller places the fourth switch in the closed state until the end of the first biphasic delay period.
6. The device of claim 5 , wherein the first switch comprises:
an n-channel field effect transistor (FET) having a source electrically coupled to the energy output, a drain electrically coupled to the first output port, and a gate electrically coupled to the energy output through a resistor; and
a p-channel FET having a source electrically coupled to the gate of the n-channel FET, a drain electrically coupled to electrical ground, and a gate electrically coupled to the controller.
7. The device of claim 5 , wherein the controller implements a second biphasic delay period after the delivery of the second current pulse between the first and second output ports, during which no current pulses are delivered between the first and second output ports and residual energy is dissipated through the second switch to electrical ground.
8. The device of claim 7 , wherein the third switch transitions from the closed state to the open state responsive to a control signal from the controller over a first portion of the second biphasic delay period, and the controller places the second switch in the closed state until the end of the second biphasic delay period.
9. The device of claim 8 , wherein the third switch comprises:
an n-channel field effect transistor (FET) having a source electrically coupled to the energy output, a drain electrically coupled to the second output port, and a gate electrically coupled to the energy output through a resistor; and
a p-channel FET having a source electrically coupled to the gate of the n-channel FET, a drain electrically coupled to electrical ground, and a gate electrically coupled to the controller.
10. The device of claim 8 , further comprising a hermetically sealed housing containing the battery, the energy discharge circuit, the first switch, the second switch, the third switch, the fourth switch, and the controller.