Branch prediction for indirect jumps by hashing current and previous branch instruction addresses
View Patent ↗Branch prediction for indirect jumps, including: receiving, by a branch prediction module, a branch address for each of a plurality of executed branch instructions; receiving, by the branch prediction module, an instruction address of a current branch instruction; creating, by the branch prediction module, an execution path identifier in dependence upon the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction; and searching, by the branch prediction module, a branch prediction table for an entry that matches the execution path identifier.
1. A method comprising:
receiving a branch address for each of a plurality of executed branch instructions, wherein the branch address for each of a plurality of executed branch instructions is a complete branch instruction address;
receiving an instruction address of a current branch instruction;
creating an execution path identifier in dependence upon the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction including performing an exclusive or operation on the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction; and
searching a branch prediction table for an entry that matches the execution path identifier.
2. The method of claim 1 further comprising, responsive to finding an entry in the branch prediction table that matches the execution path identifier:
retrieving a predicted target address for the current branch instruction from the entry in the branch prediction table that matches the execution path identifier; and
fetching an instruction stored at the predicted target address for the current branch instruction.
3. The method of claim 2 further comprising:
retrieving an actual target address for the current branch instruction; and
determining whether the predicted target address for the current branch instruction matches the actual target address for the current branch instruction.
4. The method of claim 3 further comprising, responsive to determining that the predicted target address for the current branch instruction matches the actual target address for the current branch instruction, executing the instruction stored at the predicted target address for the current branch instruction.
5. The method of claim 3 further comprising, responsive to determining that the predicted target address for the current branch instruction does not match the actual target address for the current branch instruction, updating the entry in the branch prediction table that matches the execution path identifier to include the actual target address for the current branch instruction.
6. The method of claim 1 further comprising, responsive to failing to find an entry in the branch prediction table that matches the execution path identifier, adding an entry to the branch prediction table that includes the execution path identifier and an actual target address for the current branch instruction.
7. An apparatus for branch prediction for indirect jumps, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of:
receiving a branch address for each of a plurality of executed branch instructions, wherein the branch address for each of a plurality of executed branch instructions is a complete branch instruction address;
receiving an instruction address of a current branch instruction;
creating an execution path identifier in dependence upon the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction including performing an exclusive or operation on the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction; and
searching a branch prediction table for an entry that matches the execution path identifier.
8. The apparatus of claim 7 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of, responsive to finding an entry in the branch prediction table that matches the execution path identifier:
retrieving a predicted target address for the current branch instruction from the entry in the branch prediction table that matches the execution path identifier; and
fetching an instruction stored at the predicted target address for the current branch instruction.
9. The apparatus of claim 8 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of:
retrieving an actual target address for the current branch instruction; and
determining whether the predicted target address for the current branch instruction matches the actual target address for the current branch instruction.
10. The apparatus of claim 9 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of, responsive to determining that the predicted target address for the current branch instruction matches the actual target address for the current branch instruction, executing the instruction stored at the predicted target address for the current branch instruction.
11. The apparatus of claim 9 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of, responsive to determining that the predicted target address for the current branch instruction does not match the actual target address for the current branch instruction, updating the entry in the branch prediction table that matches the execution path identifier to include the actual target address for the current branch instruction.
12. The apparatus of claim 7 further comprising computer program instructions that, when executed by the computer processor, cause the apparatus to carry out the steps of, responsive to failing to find an entry in the branch prediction table that matches the execution path identifier, adding an entry to the branch prediction table that includes the execution path identifier and an actual target address for the current branch instruction.
13. A computer program product disposed upon a non-transitory computer readable medium, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out the steps of:
receiving a branch address for each of a plurality of executed branch instructions, wherein the branch address for each of a plurality of executed branch instructions is a complete branch instruction address;
receiving an instruction address of a current branch instruction;
creating an execution path identifier in dependence upon the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction including performing an exclusive or operation on the branch address for each of the plurality of executed branch instructions and the instruction address of the current branch instruction; and
searching a branch prediction table for an entry that matches the execution path identifier.
14. The computer program product of claim 13 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of, responsive to finding an entry in the branch prediction table that matches the execution path identifier:
retrieving a predicted target address for the current branch instruction from the entry in the branch prediction table that matches the execution path identifier; and
fetching an instruction stored at the predicted target address for the current branch instruction.
15. The computer program product of claim 14 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of:
retrieving an actual target address for the current branch instruction; and
determining whether the predicted target address for the current branch instruction matches the actual target address for the current branch instruction.
16. The computer program product of claim 15 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of, responsive to determining that the predicted target address for the current branch instruction matches the actual target address for the current branch instruction, executing the instruction stored at the predicted target address for the current branch instruction.
17. The computer program product of claim 15 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of, responsive to determining that the predicted target address for the current branch instruction does not match the actual target address for the current branch instruction, updating the entry in the branch prediction table that matches the execution path identifier to include the actual target address for the current branch instruction.
18. The computer program product of claim 13 further comprising computer program instructions that, when executed, cause the computer to carry out the steps of, responsive to failing to find an entry in the branch prediction table that matches the execution path identifier, adding an entry to the branch prediction table that includes the execution path identifier and an actual target address for the current branch instruction.