IP Library Granted Patent US 9,077,258
Granted Patent B2
US 9,077,258 · App. 13/551,705 · Granted Jul 7, 2015

Regulation circuit associated with synchronous rectifier providing cable compensation for the power converter and method thereof

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Quick Facts
Patent No.
US 9,077,258
App. No.
13/551,705
Granted
Jul 7, 2015
Kind
B2
Abstract

A regulation circuit of a power converter for cable compensation according to the present invention comprises a signal generator generating a compensation signal in accordance with a synchronous rectifying signal. An error amplifier has a reference signal for generating a feedback signal in accordance with an output voltage of the power converter. The compensation signal is coupled to program the reference signal. The feedback signal is coupled to generate a switching signal for regulating an output of the power converter. The regulation circuit of the present invention compensates the output voltage without a shunt resistor to sense the output current of the power converter for reducing power loss.

Claims (36)

1. A regulation circuit of a power converter, comprising:

a signal generator generating a compensation signal in accordance with a synchronous rectifying signal; and

an error amplifier having a reference signal for generating a feedback signal in accordance with an output voltage of the power converter;

wherein the compensation signal is coupled to program the reference signal; the feedback signal is coupled to generate a switching signal for regulating an output of the power converter.

2. The regulation circuit as claimed in claim 1 , further comprising:

a resistor coupled to the signal generator for programming the level of the compensation signal in accordance with the synchronous rectifying signal.

3. The regulation circuit as claimed in claim 1 , further comprising:

a filter coupled to the reference signal for filtering the reference signal.

4. The regulation circuit as claimed in claim 3 , wherein the filter comprises:

a capacitor for filtering the reference signal.

5. The regulation circuit as claimed in claim 1 , wherein the synchronous rectifying signal is utilized to control a power transistor coupled to the power converter; wherein the power transistor is used for a synchronous rectifier.

6. The regulation circuit as claimed in claim 1 , wherein the synchronous rectifying signal is correlated to an output current of the power converter.

7. The regulation circuit as claimed in claim 1 , further comprising:

A buffer amplifier having a reference voltage and coupled to the compensation signal for generating the reference signal.

8. The regulation circuit as claimed in claim 1 , wherein the signal generator comprises:

a capacitor providing a voltage for generating the compensation signal; and

a charge circuit charging the capacitor in response to the synchronous rectifying signal for providing the voltage;

wherein the voltage is correlated to the synchronous rectifying signal.

9. The regulation circuit as claimed in claim 8 , wherein the signal generator further comprises:

a voltage to current converter converting the voltage to a current for generating the compensation signal; and

a resistor coupled to the voltage to current converter to program the current in accordance with the synchronous rectifying signal for programming the level of the compensation signal.

10. A method for a regulation circuit of a power converter, comprising:

receiving a synchronous rectifying signal for generating a compensation signal;

compensating a reference signal of an error amplifier of the regulation circuit in accordance with the compensation signal; and

generating a feedback signal in accordance with the reference signal and an output voltage of the power converter;

wherein the feedback signal is coupled to generate a switching signal for regulating an output of the power converter.

11. The method as claimed in claim 10 , further comprising:

programming the level of the compensation signal in accordance with the synchronous rectifying signal.

12. The method as claimed in claim 10 , wherein the synchronous rectifying signal is utilized to control a power transistor coupled to the power converter; wherein the power transistor is used for a synchronous rectifier.

13. The method as claimed in claim 10 , wherein the synchronous rectifying signal is correlated to an output current of the power converter.

14. The method as claimed in claim 10 , further comprising:

charging a capacitor in response to the synchronous rectifying signal to provide a voltage for generating the compensation signal;

wherein the voltage is correlated to the synchronous rectifying signal.

15. The method as claimed in claim 14 , further comprising:

converting the voltage to a current for generating the compensation signal; and

programming the current in accordance with the synchronous rectifying signal for programming the level of the compensation signal.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 054090, FRAME 0617 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064081/0167 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT RECORDED AT REEL 046410, FRAME 0933 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064072/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
SECURITY INTEREST Recorded Oct 16, 2020
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION; ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 054090/0617 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2018
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 047886/0162 →
PATENT SECURITY AGREEMENT Recorded Jun 22, 2018
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 046410/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 040773/0064 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2016
From: FAIRCHILD (TAIWAN) CORPORATION
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 040772/0947 →
CHANGE OF NAME Recorded Apr 12, 2016
From: SYSTEM GENERAL CORPORATION
To: FAIRCHILD (TAIWAN) CORPORATION
Reel/Frame 038413/0059 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2012
From: YANG, TA-YUNG; WANG, CHOU-SHENG
To: SYSTEM GENERAL CORP.
Reel/Frame 028618/0926 →