IP Library Granted Patent US 8,664,775
Granted Patent B2
US 8,664,775 · App. 13/553,084 · Granted Mar 4, 2014

Semiconductor device

Inventors: Kenichi Sasaki (Sendai, JP); Norio Fukasawa (Sendai, JP)
Assignee: Fujitsu Semiconductor Limited
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,664,775
App. No.
13/553,084
Granted
Mar 4, 2014
Kind
B2
Abstract

A semiconductor device includes a circuit substrate, a first semiconductor chip disposed on the circuit substrate, a plurality of first spacers disposed on the first semiconductor chip, a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers, a wire which connects the circuit substrate to the first semiconductor chip, and a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer, wherein each height of the plurality of the first spacers is greater than height of the wire relative to an upper face of the first semiconductor chip.

Claims (41)

1. A semiconductor device comprising:

a circuit substrate;

a first semiconductor chip disposed on the circuit substrate;

a plurality of first spacers disposed on the first semiconductor chip;

a second semiconductor chip which includes a first thermoplastic adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers;

a wire which connects the circuit substrate to the first semiconductor chip; and

a first molded thermosetting resin which seals a gap between the first semiconductor chip and the first thermoplastic adhesive agent layer.

2. The semiconductor device according to claim 1 ,

wherein all of the plurality of first spacers have an identical height.

3. The semiconductor device according to claim 2 ,

wherein a portion of the wire is buried into the first thermoplastic adhesive agent layer.

4. The semiconductor device according to claim 1 , further comprising:

a plurality of second spacers disposed on the second semiconductor chip;

a third semiconductor chip which includes a second thermoplastic adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of second spacers; and

a second molded thermosetting resin which seals at least a gap between the second semiconductor chip and the second thermoplastic adhesive agent layer.

5. The semiconductor device according to claim 1 ,

wherein each of the first spacers includes a first metallic ball directly adhered to an adhesive pad disposed on a surface of the first semiconductor chip and a second metallic ball directly adhered to the first metallic ball.

6. The semiconductor device according to claim 5 ,

wherein the wire includes a wire ball adhered to the surface of the first semiconductor chip; and

the first metallic ball and the second metallic ball included in the first spacer is larger than the wire ball.

7. A semiconductor device comprising:

a circuit substrate;

a semiconductor chip disposed on the circuit substrate;

a plurality of spacers disposed on the semiconductor chip;

a heat sink which includes an adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers;

a wire which connects the circuit substrate to the semiconductor chip; and

a sealing material which seals a gap between the semiconductor chip and the adhesive agent layer.

8. A semiconductor device comprising:

a circuit substrate;

a first semiconductor chip disposed on the circuit substrate;

a plurality of first spacers disposed on the first semiconductor chip;

a second semiconductor chip which includes a first adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers;

a wire which connects the circuit substrate to the first semiconductor chip; and

a first sealing material which seals a gap between the first semiconductor chip and the first adhesive agent layer and of which a thermal expansion coefficient is closer to a thermal expansion coefficient of the first semiconductor chip than a thermal expansion coefficient of the first adhesive agent layer.

9. A semiconductor device comprising:

a circuit substrate;

a semiconductor chip disposed on the circuit substrate;

a plurality of spacers disposed on the semiconductor chip;

a heat sink which includes an adhesive agent layer on a lower face thereof and is disposed on upper portions of the plurality of spacers;

a wire which connects the circuit substrate to the semiconductor chip; and

a sealing material which seals a gap between the semiconductor chip and the adhesive agent layer and of which a thermal expansion coefficient is closer to a thermal expansion coefficient of the semiconductor chip than a thermal expansion coefficient of the adhesive agent layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2012
From: SASAKI, KENICHI; FUKASAWA, NORIO
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 028612/0114 →
Priority Claims (1)
JP 2011-170422 · Aug 3, 2011 · national
Continuity (1)
Related Publication 20130032942A1 · Feb 7, 2013