IP Library Granted Patent US 10,181,540
Granted Patent B2
US 10,181,540 · App. 13/557,255 · Granted Jan 15, 2019

Solar cell and method of manufacturing the same

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Quick Facts
Patent No.
US 10,181,540
App. No.
13/557,255
Granted
Jan 15, 2019
Kind
B2
Abstract

An aspect of the invention provides a solar cell that comprises a semiconductor substrate having a light-receiving surface and a rear surface; a first semiconductor layer having a first conductivity type; a second semiconductor layer having a second conductivity type, the first semiconductor layer and the second semiconductor layer being formed on the rear surface, and a trench formed in the rear surface, wherein the first semiconductor layer is formed on the rear surface in which the trench is not formed, and the second semiconductor layer is formed on a side surface of the trench in an arrangement direction in which the first semiconductor layer and the second semiconductor layer are alternately arranged and on a bottom surface of the trench.

Claims (50)

1. A solar cell comprising:

a semiconductor substrate containing a crystalline semiconductor material and having a light-receiving surface and a rear surface;

a first amorphous semiconductor layer having a first conductivity type;

a second amorphous semiconductor layer having a second conductivity type, the first amorphous semiconductor layer and the second amorphous semiconductor layer being formed on the rear surface such that the first and second amorphous semiconductor layers are alternatively arranged in an arrangement direction on the rear surface, and

a trench formed in the rear surface, wherein

the first amorphous semiconductor layer is formed on an area of the rear surface in which the trench is not formed, thereby forming a first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate, and wherein a first transparent electrode layer and first collection electrode are formed on the first amorphous semiconductor layer,

the second amorphous semiconductor layer is formed inside of the trench, on a bottom surface of the trench and, on a side surface of the trench in the arrangement direction and wherein a second transparent electrode layer and second collection electrode are formed on the second amorphous semiconductor layer,

each of a second junction between the second amorphous semiconductor layer and the side surface and a third junction between the second amorphous semiconductor layer and the bottom surface is a hetero-junction, and the bottom surface of the trench is closer, in a direction orthogonal to the rear surface of the semiconductor substrate, to the light-receiving surface of the semiconductor substrate than the area of the rear surface in which the trench is not formed and at which the first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate is formed,

the side surface of the trench is inclined with respect to and is continuously connected with the bottom surface of the trench,

a boundary of the side surface and the bottom surface forms an arc shape, and

the second and third hetero-junctions are formed along the arc shape.

2. The solar cell according to claim 1 , wherein the semiconductor substrate has the first conductivity type.

3. A solar cell comprising:

a semiconductor substrate containing a crystalline semiconductor material and having a light-receiving surface and a rear surface;

a first amorphous semiconductor layer having a first conductivity type;

a second amorphous semiconductor layer having a second conductivity type, the first amorphous semiconductor layer and the second amorphous semiconductor layer being formed on the rear surface such that the first and second amorphous semiconductor layers are alternatively arranged in an arrangement direction on the rear surface, and

a trench formed in the rear surface, wherein

the first amorphous semiconductor layer is formed on an area of the rear surface in which the trench is not formed, thereby forming a first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate, and wherein a first transparent electrode layer and first collection electrode are formed on the first amorphous semiconductor layer,

the second amorphous semiconductor layer is formed inside of the trench, on a bottom surface of the trench, and on a side surface of the trench in the arrangement direction and wherein a second transparent electrode layer and second collection electrode are formed on the second amorphous semiconductor layer,

each of a second junction between the second amorphous semiconductor layer and the side surface and a third junction between the second amorphous semiconductor layer and the bottom surface is a hetero-junction, and the bottom surface of the trench is closer, in a direction orthogonal to the rear surface of the semiconductor substrate, to the light-receiving surface of the semiconductor substrate than the area of the rear surface in which the trench is not formed and at which the first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate is formed,

the side surface of the trench is inclined with respect to and is continuously connected with the bottom surface of the trench, and

a width of the second amorphous semiconductor layer formed on the rear surface in the arrangement direction is longer than a width of the first amorphous semiconductor layer formed on the rear surface in the arrangement direction.

4. The solar cell according to claim 1 , wherein

the semiconductor substrate has the second conductivity type, and

a width of the second amorphous semiconductor layer formed on the rear surface in the arrangement direction is shorter than a width of the first amorphous semiconductor layer formed on the rear surface in the arrangement direction.

5. The solar cell according to claim 1 , wherein the first amorphous semiconductor layer is in contact with the second amorphous semiconductor layer on the rear surface.

6. The solar cell according to claim 1 , wherein the first amorphous semiconductor layer is in contact with the second amorphous semiconductor layer on a boundary between the area of the rear surface in which the trench is not formed and the trench.

7. A solar cell, comprising:

a semiconductor substrate containing a crystalline semiconductor material and having a light-receiving surface and a rear surface;

a first amorphous semiconductor layer formed on the rear surface of the semiconductor substrate;

an insulation layer formed on the first amorphous semiconductor layer and formed to include an aperture exposing the first amorphous semiconductor layer;

a second amorphous semiconductor layer arranged alternately in an arrangement direction with the first amorphous semiconductor layer on the rear surface of the semiconductor substrate and formed to cover the insulation layer;

an underlying electrode formed on the first amorphous semiconductor layer and the second amorphous semiconductor layer and formed to include an isolation trench on the insulation layer, the isolation trench electrically isolating the first amorphous semiconductor layer and the second semiconductor layer from each other;

a collection electrode formed on the underlying electrode; and

a trench formed in the rear surface, wherein

the first amorphous semiconductor layer is formed on an area of the rear surface in which the trench is not formed, thereby forming a first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate,

the second amorphous semiconductor layer is formed inside of the trench, on a bottom surface of the trench, and on a side surface of the trench in the arrangement direction,

each of a second junction between the second amorphous semiconductor layer and the side surface and a third junction between the second amorphous semiconductor layer and the bottom surface is a hetero-junction, and the bottom surface of the trench is closer, in a direction orthogonal to the rear surface of the semiconductor substrate, to the light-receiving surface of the semiconductor substrate than the area of the rear surface in which the trench is not formed and at which the first hetero-junction between the first amorphous semiconductor layer and the semiconductor substrate is formed,

the side surface of the trench is inclined with respect to and is continuously connected with the bottom surface of the trench,

a boundary of the side surface and the bottom surface forms an arc shape, and

the second and third hetero-junctions are formed along the arc shape.

8. The solar cell according to claim 7 , wherein the second amorphous semiconductor layer is exposed at a bottom of the isolation trench.

9. The solar cell according to claim 8 , wherein the first amorphous semiconductor layer and the second amorphous semiconductor layer are in contact with each other on a boundary between the rear surface in which the isolation trench is not formed and the trench.

10. The solar cell according to claim 7 , wherein the first amorphous semiconductor layer has a p-type conductivity type and the second amorphous semiconductor layer has an n-type conductivity type.

11. The solar cell according to claim 1 , wherein

the first amorphous semiconductor layer is on the area of the rear surface in which no trench is provided such that the first amorphous semiconductor layer is flat without a convex and concave.

12. The solar cell according to claim 3 , wherein

the first amorphous semiconductor layer is on the area of the rear surface in which no trench is provided such that the first amorphous semiconductor layer is flat without a convex and concave.

13. The solar cell according to claim 7 , wherein

the first amorphous semiconductor layer is on the area of the rear surface in which no trench is provided such that the first amorphous semiconductor layer is flat without a convex and concave.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: SANYO ELECTRIC CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 035071/0276 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2015
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 035071/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2012
From: IDE, DAISUKE; MISHIMA, TAKAHIRO; SHIGEMATSU, MASATO; BABA, TOSHIAKI; MORI, HIROYUKI; MORIGAMI, MITSUAKI; HISHIDA, YUJI; SAKATA, HITOSHI; GOTO, RYO
To: SANYO ELECTRIC CO., LTD.
Reel/Frame 029096/0209 →