Capacitance difference detecting circuit
A capacitance difference detecting circuit with a control circuit, a first capacitor, a second capacitor, a voltage control unit and a computing device. The control circuit generates a control signal according to a first voltage and a second voltage. The voltage control unit cooperates with the first capacitor to be detected and the second capacitor to be detected, according to the control signal, to generate the first voltage and the second voltage. The computing device computes a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit.
1. A capacitance difference detecting circuit, comprising:
a control circuit, for generating a control signal according to a first voltage and a second voltage;
a first capacitor to be detected;
a second capacitor to be detected;
a voltage control unit, for cooperating with the first capacitor to be detected and the second capacitor to be detected, according to the control signal, to generate the first voltage and the second voltage; and
a computing device, for computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit;
wherein the control circuit comprises:
a comparator, comprising a first input terminal, a second input terminal and an output terminal, wherein the comparator compares the first voltage at the first input terminal and the second voltage at the second input terminal to output a comparison result signal at the output terminal;
a control signal generator, for generating the control signal according to the comparison result signal;
wherein the first capacitor to be detected includes a first terminal coupled to a predetermined voltage and a second terminal coupled to the first input terminal; where the second capacitor to be detected includes a third terminal coupled to the predetermined voltage and a fourth terminal coupled to the second input terminal.
2. The capacitance difference detecting circuit of claim 1 , wherein the control signal generator is a digital logic controller.
3. The capacitance difference detecting circuit of claim 1 , further comprising:
a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal;
a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal;
wherein the computing device computes the capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage, a parameter of the voltage control unit and capacitance values of the first constant capacitor and the second constant capacitor.
4. The capacitance difference detecting circuit of claim 3 , wherein the first constant capacitor and the second constant capacitor are parasitic capacitors.
5. A capacitance difference detecting circuit, comprising:
a control circuit, for generating a control signal according to a first voltage and a second voltage;
a first capacitor to be detected;
a second capacitor to be detected;
a voltage control unit, for cooperating with the first capacitor to be detected and the second capacitor to be detected, according to the control signal, to generate the first voltage and the second voltage;
a computing device, for computing a capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage and a parameter of the voltage control unit;
a first constant capacitor, having a terminal coupled to the first terminal of the first capacitor to be detected and the first input terminal; and
a second constant capacitor, having a terminal coupled to the first terminal of the second capacitor to be detected and the second input terminal;
wherein the computing device computes the capacitance difference between the first capacitor to be detected and the second capacitor to be detected according to the first voltage, the second voltage, a parameter of the voltage control unit and capacitance values of the first constant capacitor and the second constant capacitor.
6. The capacitance difference detecting circuit of claim 5 , wherein the first constant capacitor and the second constant capacitor are parasitic capacitors.