IP Library Granted Patent US 8,548,411
Granted Patent B2
US 8,548,411 · App. 13/563,955 · Granted Oct 1, 2013

Low-complexity diversity reception

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Quick Facts
Patent No.
US 8,548,411
App. No.
13/563,955
Granted
Oct 1, 2013
Kind
B2
Abstract

A system may comprise a plurality of signal processing paths, a bin-wise combiner, an inverse transformation block, and a DAC. Each signal processing path may comprise a transformation block that is operable to transform a first time-domain digital signal to an associated frequency-domain signal having a plurality of subband signals. The bin-wise combiner may be operable to combine corresponding subband signals of the plurality of signal processing paths. The inverse transformation block may be operable to transform output of the bin-wise combiner to an second time-domain signal. The DAC may be operable to converts the second time-domain signal to a corresponding analog signal.

Claims (56)

1. A wireless receiver comprising:

a plurality of signal processing paths, each signal processing path comprising:

a mixer adapted to downconvert a frequency of an RF signal received by the path;

an analog-to digital converter adapted to convert the downconverted signal from an analog signal to a digital signal; and

a transformation block adapted to transform the digital signal represented in time domain to an associated frequency domain signal having a plurality of subband signals;

a bin-wise combiner adapted to combine corresponding subband signals of the plurality of paths;

an inverse transformation block adapted to transform output of the bin-wise combiner to an associated time-domain signal; and

a digital-to-analog converter (DAC) adapted to convert said associated time-domain signal to a corresponding analog signal.

2. The wireless receiver of claim 1 , wherein:

said wireless receiver resides on an integrated circuit; and

said corresponding analog signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

3. The wireless receiver of claim 1 , wherein:

said wireless receiver resides on an integrated circuit; and

said associated time-domain signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

4. The wireless receiver of claim 1 , wherein said RF signal is a terrestrial television signal.

5. The wireless receiver of claim 4 , wherein said RF signal is a DVB-T signal.

6. The wireless receiver of claim 4 , wherein said first RF signal is a ISDB-T signal.

7. A wireless receiver comprising:

a plurality of signal processing paths, each signal processing path comprising a transformation block adapted to transform a digital signal represented in time domain to an associated frequency domain signal having a plurality of subband signals;

a bin-wise combiner that is adapted to combine corresponding subband signals of the plurality of paths;

an inverse transformation block that is adapted to transform output of the bin-wise combiner to an associated time-domain signal; and

a digital-to-analog converter (DAC) that is adapted to convert said associated time-domain signal to a corresponding analog signal.

8. The wireless receiver of claim 7 , wherein:

said wireless receiver resides on an integrated circuit; and

said corresponding analog signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

9. The wireless receiver of claim 7 , wherein:

said wireless receiver resides on an integrated circuit; and

said associated time-domain signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

10. The wireless receiver of claim 7 , wherein said digital signal represented in time-domain is a terrestrial television signal.

11. A system comprising:

a plurality of signal processing paths, each signal processing path comprising a transformation block that is operable to transform a first time-domain digital signal to an associated frequency-domain signal having a plurality of subband signals;

a bin-wise combiner that is operable to combine corresponding subband signals of the plurality of signal processing paths;

an inverse transformation block that is operable to transform output of the bin-wise combiner to an second time-domain signal; and

a digital-to-analog converter (DAC) that that is operable to convert said second time-domain signal to a corresponding analog signal.

12. The system of claim 11 , wherein:

said system resides on an integrated circuit; and

said corresponding analog signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

13. The system of claim 11 , wherein:

said system resides on an integrated circuit; and

said second time-domain signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

14. The system of claim 11 , wherein said first time-domain signal is a terrestrial television signal.

15. The system of claim 14 , wherein said first time-domain signal is a DVB-T signal or ISDB-T signal.

16. A method of processing signals in a receiver having a plurality of signal processing paths, the method comprising:

transforming a first time-domain signal to a first frequency-domain signal, said first frequency-domain signal comprising a plurality of first subband signals;

transforming a second time-domain signal to a second frequency-domain signal, said second frequency domain signal comprising a plurality of second subband signals;

combining each of said first subband signals with a corresponding one of said second subband signals, resulting in a third frequency-domain signal comprising a plurality of combined subband signals;

performing an inverse transformation to transform said third frequency-domain signal to a third time-domain signal; and

converting said third time-domain signal to a corresponding analog signal.

17. The method of claim 16 , wherein:

said receiver resides on an integrated circuit; and

said corresponding analog signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

18. The method of claim 16 , wherein:

said receiver resides on an integrated circuit; and

said third time-domain signal is coupled to a bond pad of said integrated circuit such that it is available to devices external to said integrated circuit.

19. The method of claim 16 , wherein said first time-domain signal is a terrestrial television signal.

20. The method of claim 19 , wherein said first time-domain signal is a DVB-T signal or ISDB-T signal.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 12, 2021
From: MAXLINEAR, INC.
To: ENTROPIC COMMUNICATIONS, LLC
Reel/Frame 055898/0230 →
RELEASE OF SECURITY INTEREST Recorded Mar 31, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 055779/0001 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2013
From: ANANDKUMAR, ANAND K.; LING, CURTIS; KANG, SUGBONG
To: MAXLINEAR, INC.
Reel/Frame 029576/0098 →