Variable reluctance sensor interface with integration based arming threshold
An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.
1. An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor, comprising:
an integrator including an input for receiving the variable reluctance sensor signal and including an output providing an integrated signal which is indicative of total flux change of the variable reluctance sensor;
an arming comparator which compares said integrated signal with a predetermined arming threshold and which provides an armed signal indicative thereof;
a detect circuit which receives said armed signal and which provides a reset signal to reset said integrator after said armed signal is provided;
a detect comparator that compares the variable reluctance sensor signal with a reference signal and that provides a zero detect signal indicative thereof; and
wherein said detect circuit provides a crossing signal when said zero detect signal is provided after said armed signal indicates an armed condition.
2. The interface of claim 1 , wherein said integrator comprises an amplifier with a feedback capacitor, further comprising a switch coupled to discharge said capacitor in response to said reset signal.
3. The interface of claim 1 , wherein said predetermined arming threshold has a value sufficient to minimize false arming.
4. The interface of claim 1 , wherein said crossing signal is used as said reset signal.
5. The interface of claim 1 , wherein said detect circuit provides said reset signal at a selected time after said armed signal is provided and before a subsequent pulse of the variable reluctance sensor signal.
6. The interface of claim 1 , wherein said arming comparator clears the armed signal before onset of a subsequent pulse of the variable reluctance sensor signal.
7. The interface of claim 1 , wherein:
said integrator comprises:
a resistor including a first end coupled to a node receiving the variable reluctance sensor signal and including a second end;
a capacitor; and
an amplifier including a first input coupled to said second end of said resistor and to a first end of said capacitor, including a second input receiving a reference signal, and including an output coupled to a second end of said capacitor and providing said integrated signal; and
wherein said arming comparator includes a first input receiving said integrated signal, includes a second input receiving said predetermined arming threshold, and includes an output providing said armed signal.
8. The interface of claim 7 , further comprising:
a transistor including first and second current terminals coupled to said first and second ends of said capacitor, respectively, and including a control terminal; and
wherein said detect circuit comprises a latch including a clock input receiving said armed signal, including a data input receiving a logic one signal, and including an output providing a crossing signal to said control terminal of said transistor.
9. The interface of claim 8 , further comprising a detect comparator including a first input for receiving the variable reluctance sensor signal, including a second input receiving said reference signal, and including an output providing a detect signal to an inverting reset input of said latch.
10. The interface of claim 9 , further comprising at least one filter for filtering at least one of said armed signal and said detect signal.
11. An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor, comprising:
an integrator including an input for receiving the variable reluctance sensor signal and including an output providing an integrated signal which is indicative of total flux change of the variable reluctance sensor, wherein said integrator comprises:
a resistor including a first end coupled to a node receiving the variable reluctance sensor signal and including a second end;
a capacitor; and
an amplifier including a first input coupled to said second end of said resistor and to a first end of said capacitor, including a second input receiving a reference signal, and including an output coupled to a second end of said capacitor and providing said integrated signal;
an arming comparator which compares said integrated signal with a predetermined arming threshold and which provides an armed signal indicative thereof, wherein said arming comparator includes a first input receiving said integrated signal, includes a second input receiving said predetermined arming threshold, and includes an output providing said armed signal;
a transistor including first and second current terminals coupled to said first and second ends of said capacitor, respectively, and including a control terminal; and
a detect circuit which receives said armed signal and which provides a reset signal to reset said integrator after said armed signal is provided, wherein said detect circuit comprises a latch including a clock input receiving said armed signal, including a data input receiving a logic one signal, and including an output providing a crossing signal to said control terminal of said transistor.
12. The interface of claim 11 , further comprising a detect comparator including a first input for receiving the variable reluctance sensor signal, including a second input receiving said reference signal, and including an output providing a detect signal to an inverting reset input of said latch.
13. The interface of claim 12 , further comprising at least one filter for filtering at least one of said armed signal and said detect signal.