IP Library Granted Patent US 9,171,895
Granted Patent B2
US 9,171,895 · App. 13/566,113 · Granted Oct 27, 2015

Display and method of manufacturing the same

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Quick Facts
Patent No.
US 9,171,895
App. No.
13/566,113
Granted
Oct 27, 2015
Kind
B2
Abstract

A display, a method of manufacturing the display, and an electronic apparatus are provided. The display includes a resin, a transistor; and a light shielding material positioned between the resin and the transistor. The light shielding material is configured to suppress an incidence of light on the transistor. Light is prevented from entering an oxide semiconductor layer to be used as an active layer so as to suppress deterioration of transistor characteristics.

Claims (51)

1. A display comprising:

a transistor positioned in a pixel region;

a light shielding material positioned outside the pixel region, at least a portion of the light shielding material being positioned laterally with respect to the transistor to cover at least a part of a side face of the transistor thereby suppressing an incidence of light on the transistor; and

a resin positioned outside the pixel region and the light shielding material such that the light shielding material is positioned between the transistor and the resin,

wherein the light shielding material includes a plurality of recessed portions on an outer light incidence side of the light shielding material.

2. The display of claim 1 , wherein the transistor is a thin film transistor.

3. The display of claim 1 , wherein the transistor includes an oxide semiconductor.

4. The display of claim 1 , further comprising:

a light emitting device, wherein the light emitting device and the transistor are in the pixel region.

5. The display of claim 4 , wherein the light shielding material covers a side of the transistor facing a periphery of the display and covers a side of the light emitting device facing the periphery of the display.

6. The display of claim 1 ,

further comprising a light emitting device,

wherein the light shielding material contacts an upper side of the light emitting device.

7. The display of claim 1 , further comprising:

a light emitting device; and

an insulating layer between the light emitting device and the transistor,

wherein the light shielding material is provided on a side of the insulating layer.

8. The display of claim 1 , further comprising:

a light emitting device; and

a protective layer provided above the light emitting device,

wherein the light shielding material is provided on at least one of an upper side and a peripheral side of the protective layer.

9. The display of claim 1 , wherein irregularities are provided on a surface of the light shielding material.

10. The display of claim 1 , wherein the light shielding material is at least one of titanium oxide and zinc oxide.

11. The display of claim 1 , further comprising:

a light emitting device; and

contact layer in contact with the light emitting device and the transistor,

wherein the light shielding material is at a position equal to or higher than where the contact layer contacts the transistor.

12. The display of claim 1 , wherein a bottom side of the light shielding material is coplanar with a bottom side of the transistor.

13. The display of claim 1 , further comprising:

a Chip On Film,

wherein the light shielding material is provided between the Chip on Film and the transistor.

14. The display of claim 1 , further comprising:

an insulting layer, and

a light emitting device,

wherein the light shielding material is provided on a side of the insulating layer and around the light emitting device.

15. The display of claim 1 , further comprising:

a light emitting device,

wherein the shielding material is provided at a height of the light emitting device.

16. A method of manufacturing a display comprising:

forming a transistor positioned in a pixel region;

forming a light shielding material positioned outside the pixel region, at least a portion of the light shielding material being positioned laterally with respect to the transistor to cover at least a part of a side face of the transistor thereby suppressing an incidence of light on the transistor; and

forming a resin positioned outside the pixel region and the light shielding material such that the light shielding material is positioned between the transistor and the resin,

wherein the light shielding material includes a plurality of recessed portions on an outer light incidence side of the light shielding material.

17. An electronic apparatus comprising:

a transistor positioned in a pixel region;

a light shielding material positioned outside the pixel region , at least a portion of the light shielding material being positioned laterally with respect to the transistor to cover at least a part of a side face of the transistor thereby suppressing an incidence of light on the transistor; and

a resin positioned outside the pixel region and the light shielding material such that the light shielding material is positioned between the transistor and the resin,

wherein the light shielding material includes a plurality of recessed portions on an outer light incidence side of the light shielding material.

18. The electronic apparatus of claim 17 , further comprising:

a display.

19. The electronic apparatus of claim 18 , wherein the display is any one of an OLED, electric paper, and a liquid crystal display.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY DATA PREVIOUSLY RECORDED AT REEL: 035616 FRAME: 0124. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 26, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 035771/0551 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2015
From: SONY CORPORATION
To: JOLED INC
Reel/Frame 035616/0124 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2012
From: NAKADAIRA, TADAKATSU
To: SONY CORPORATION
Reel/Frame 028760/0205 →