IP Library Granted Patent US 8,553,446
Granted Patent B2
US 8,553,446 · App. 13/567,646 · Granted Oct 8, 2013

Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor device incorporating nonvolatile memory element

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,553,446
App. No.
13/567,646
Granted
Oct 8, 2013
Kind
B2
Abstract

A nonvolatile memory element of the present invention comprises a first electrode ( 103 ), a second electrode ( 108 ); a resistance variable layer ( 107 ) which is interposed between the first electrode ( 103 ) and the second electrode ( 107 ) and is configured to switch a resistance value reversibly in response to an electric signal applied between the electrodes ( 103 ) and ( 108 ), and the resistance variable layer ( 107 ) has at least a multi-layer structure in which a first hafnium-containing layer having a composition expressed as HfO x (0.9≦x≦1.6), and a second hafnium-containing layer having a composition expressed as HfO y (1.8<y<2.0) are stacked together.

Claims (29)

1. A nonvolatile memory element comprising:

a first electrode;

a second electrode; and

a resistance variable layer which is interposed between the first electrode and the second electrode and is configured to switch a resistance value reversibly in response to electric signals applied between the electrodes; the nonvolatile memory element being configured to reversibly switch a resistance value between the first electrode and the second electrode in response to electric signals of different polarities which are applied between the first electrode and the second electrode;

wherein the resistance variable layer has a multi-layer structure in which a second hafnium oxide layer being electrically conductive and having a composition expressed as HfO x , and a first hafnium oxide layer having a composition expressed as HfO y (x<y) are stacked together.

2. The nonvolatile memory element according to claim 1 ,

wherein the first hafnium oxide layer has a thickness which is not less than 3 nm and not more than 4 nm.

3. The nonvolatile memory element according to claim 1 ,

wherein the first hafnium oxide layer is in contact with one of the first electrode and the second electrode.

4. The nonvolatile memory element according to claim 3 ,

wherein when a resistance value between the first electrode and the second electrode which occurs by applying a positive electric pulse with a magnitude of V H to an electrode with which the first hafnium oxide layer is in contact is expressed as R H , and a resistance value between the first electrode and the second electrode which occurs by applying a negative electric pulse with a magnitude of V L to the electrode with which the first hafnium oxide layer is in contact is expressed as R L ,|V H |>|V L |, and R H >R L are satisfied.

5. The nonvolatile memory element according to claim 1 ,

wherein the nonvolatile memory element includes a current rectifying element provided between the first electrode and the second electrode; and

wherein the current rectifying element is electrically connected to the resistance variable layer.

6. The nonvolatile memory element according to claim 1 ,

wherein the second hafnium oxide layer comprises oxygen-deficient hafnium oxide.

7. The nonvolatile memory element according to claim 1 ,

wherein 0.9<×<1.6 is satisfied.

8. A method of manufacturing a nonvolatile memory element including a first electrode; a second electrode; and a resistance variable layer which is interposed between the first electrode and the second electrode and is configured to switch a resistance value reversibly in response to electric signals of different polarities which are applied between the first electrode and the second electrode;

wherein the resistance variable layer has a multi-layer structure in which a second hafnium oxide layer having a composition expressed as HfO x , and a first hafnium oxide layer having a composition expressed as HfO y (x<y) are stacked together, the method comprising:

forming the second hafnium oxide layer by a sputtering process or a chemical vapor deposition process.

9. The method of manufacturing the nonvolatile memory element according to claim 8 , comprising:

forming the first hafnium oxide layer by a sputtering process or a chemical vapor deposition process.

10. The method of manufacturing the nonvolatile memory element according to claim 8 , comprising:

forming the first hafnium oxide layer by partially oxidating the second hafnium oxide layer.

11. The method of manufacturing the nonvolatile memory element according to claim 8 ,

wherein the first hafnium oxide layer is formed to have a thickness which is not less than 3 nm and not more than 4 nm.

12. The method of manufacturing the nonvolatile memory element according to claim 8 ,

wherein the first hafnium oxide layer is in contact with one of the first electrode and the second electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →