IP Library Granted Patent US 9,137,069
Granted Patent B2
US 9,137,069 · App. 13/568,214 · Granted Sep 15, 2015

Systems and methods to frequency shift unwanted signal components

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Quick Facts
Patent No.
US 9,137,069
App. No.
13/568,214
Granted
Sep 15, 2015
Kind
B2
Abstract

A transmission circuit includes a shift circuit, a second shift circuit, and a modulation circuit. The shift circuit is configured to select a shift amount according to shift parameters and to introduce the shift amount in a first direction into in phase and quadrature phase baseband signals. The second circuit is configured to selectively introduce the shift amount in a second direction into local oscillator signals. The modulation circuit is configured to modulate the shifted baseband signals onto the shifted local oscillator signals to generate a composite modulated output signal. Unwanted components of the output signal are shifted away from original or specified limits. Wanted components of the output signal are unshifted.

Claims (25)

1. A transmission circuit comprising:

a shift circuit configured to select a shift amount according to shift parameters and to introduce the shift amount in a first direction into in-phase (I) and quadrature phase (Q) equivalent baseband signals, wherein the shift amount is a frequency shift;

a second circuit configured to selectively introduce the shift amount in a second direction into local oscillator signals; and

a modulation circuit configured to perform a modulation of the shifted baseband signals onto the shifted local oscillator signals to generate a composite modulated output signal, wherein unwanted components of the composite modulated output signal are shifted away from specified limits and wanted components are unshifted, wherein the unwanted components include an image component centered at a frequency of f c −f m +2Δf, where f c is a carrier frequency, f m is a baseband modulation frequency and Δf is the shift amount.

2. The circuit of claim 1 , wherein the shift parameters include a number of allocated resource blocks.

3. The circuit of claim 2 , wherein the shift parameters further include an output power.

4. The circuit of claim 1 , wherein the composite modulated output signal includes a resource block component.

5. The circuit of claim 4 , wherein the resource block component is centered about a frequency given by a carrier frequency and a baseband modulation frequency.

6. The circuit of claim 1 , wherein the unwanted components include a carrier component at a frequency of f c +Δf, where f c is a carrier frequency of the unshifted case and Δf is a shift amount.

7. The circuit of claim 1 , wherein the unwanted components include an IM 3 component centered about a frequency of f c −3f m +4Δf, where f c is a carrier frequency, f m is a baseband modulation frequency, Δf is the shift amount and IM 3 is a third order based component shifted from the carrier frequency by a factor of 3.

8. The circuit of claim 1 , wherein the specified limits include a co-existence limit.

9. The circuit of claim 1 , wherein the shift circuit includes a CORDIC configured to introduce the shift amount.

10. The circuit of claim 1 , wherein the second direction is opposite the first direction.

11. A transmission circuit comprising:

a baseband component configured to generate original baseband signals;

a shift generation circuit configured to generate a shift amount according to shift parameters including an allocated resource block and a co-existence limit;

a frequency shift component configured to generate shifted baseband signals from the original baseband signals according to the shift amount;

a bypass component configured to provide selected baseband signals from the original baseband signals in a bypass mode and to provide the selected baseband signals from the shifted baseband signals in a shift mode; and

a modulation circuit configured to modulate the selected baseband signals with selected oscillator signals to generate an output signal, wherein unwanted components of the output signal are outside the co-existence limit.

12. The circuit of claim 11 , wherein the bypass component is configured to use the shift mode for a range proximate a maximum output power of the output signal.

13. The circuit of claim 11 , wherein the shift parameters further include a given IM 3 suppression and a number of resource blocks.

14. The circuit of claim 11 , wherein the shift generation circuit is configured to dynamically generate the shift amount.

15. The circuit of claim 11 , further comprising an oscillator circuit that generates the selected oscillator signals.

16. The circuit of claim 11 , further comprising a digital controller configured to select one of the bypass mode and the shift mode.

17. The circuit of claim 16 , wherein the digital controller is configured to control the oscillator circuit to generate the selected oscillator signals with a frequency shift specified by the shift amount from the shift generation circuit.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2012
From: GOSSMANN, TIMO; HOLM, ANDREAS
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 028817/0128 →