IP Library Granted Patent US 9,076,770
Granted Patent B2
US 9,076,770 · App. 13/569,267 · Granted Jul 7, 2015

Integrated circuit die stacks having initially identical dies personalized with fuses and methods of manufacturing the same

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Quick Facts
Patent No.
US 9,076,770
App. No.
13/569,267
Granted
Jul 7, 2015
Kind
B2
Abstract

Integrated circuit die stacks having a first die mounted upon a substrate, the first die manufactured to be initially identical to a second die with a plurality of through silicon vias (‘TSVs’), the first die personalized by blowing fuses on the first die, converting the TSVs previously connected through the blown fuses into pass-through vias (‘PTVs’), each PTV implementing a conductive pathway through the first die with no connection to any circuitry on the first die; and the second die, manufactured to be initially identical to the first die and later personalized by blowing fuses on the second die, the second die mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die.

Claims (42)

1. An integrated circuit die stack comprising:

a first die mounted upon a substrate; and

a second die mounted on the first die; both dies having a plurality of through silicon vias (‘TSVs’), the TSVs connected through fuses to electronic circuitry on each die,

wherein a portion of the TSVs of each die are connected to blown fuses and converted to pass-through vias (‘PTVs’), wherein the second die is mounted upon the first die so that the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die; and

an interface die mounted upon the substrate between the substrate and the first die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die.

2. The die stack of claim 1 wherein the substrate comprises a plurality of conductors connected to conductive pathways in the dies, the conductors including power lines, common lines, and the signal lines.

3. The die stack of claim 1 further comprising:

a first die substack mounted upon the substrate, the first substack comprising two or more dies manufactured to be initially identical to dies in a second die substack with TSVs, the TSVs connected through fuses to electronic circuitry on each of the dies of the first substack, the dies of the first substack personalized by blowing on the dies of the first substack a number of same fuses in each die of the first substack, converting the TSVs previously connected through the blown fuses into PTVs, each of the dies in the first substack stacked directly upon one another with no rotation and no shift in position with respect to one another; and

the second substack, the second substack comprising dies manufactured to be initially identical to the dies of the first substack and later personalized by blowing same fuses in the dies of the second substack, each of the dies in the second substack stacked directly upon one another with no rotation and no shift in position with respect to one another, the second substack mounted upon the first substack so that the PTVs in the first substack connect conductors from the substrate through the first substack to TSVs in the second substack.

4. The die stack of claim 2 further comprising:

the interface die multiplexing and demultiplexing the same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the signal lines on the substrate, to the PTVs, and to the TSVs all operating at a same clock speed.

5. The die stack of claim 2 further comprising:

an interface die mounted upon the substrate between the substrate and the first die in the dies stack, the interface die multiplexing and demultiplexing a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the substrate operating the signal lines on the substrate at a first clock speed and the interface die operating the signal lines to the PTVs and to the TSVs at a second clock speed, the first clock speed sufficiently faster than the second clock speed to fit onto the signal lines of the interface die all communications between the substrate and the PTVs and the TSVs.

6. A method comprising:

fabricating a plurality of initially identical integrated circuit dies, each die including a plurality of TSVs, the TSVs connected through fuses to electronic circuitry on each die;

mounting a first one of the initially identical dies upon a substrate, wherein a portion of the TSVs of the first die are connected to blown fuses and converted to pass-through vias (‘PTVs’);

mounting a second one of the initially identical dies directly on the first die, wherein a portion of the second die are connected to blown fuses and converted to PTVs, the second die mounted on the first die such that, wherein the PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die; and

mounting an interface die upon the substrate between the substrate and the first die, the interface die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die.

7. The method of claim 6 wherein the substrate comprises a plurality of conductors connected to conductive pathways in the dies, the conductors including power lines, common lines, and the signal lines.

8. The method of claim 6 further comprising:

mounting an interface die upon the substrate between the substrate and the first die, the interface die multiplexing and demultiplexing a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the signal lines on the substrate, to the PTVs, and to the TSVs all operating at a same clock speed.

9. The method of claim 6 further comprising:

mounting an interface die upon the substrate between the substrate and the first die, the interface die multiplexing and demultiplexing a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the substrate operating the signal lines on the substrate at a first clock speed and the interface die operating the signal lines to the PTVs and to the TSVs at a second clock speed, the first clock speed sufficiently faster than the second clock speed to fit onto the signal lines of the interface die all communications between the substrate and the PTVs and the TSVs.

10. The method of claim 6 further comprising:

creating a first substack by stacking upon one another at least two of the identical dies with no rotation and no shift in position with respect to other dies in the first substack, personalizing the first substack by blowing one or more same fuses in each die of the first substack thereby converting same TSVs on each die of the first substack into PTVs;

mounting the first substack on the substrate;

creating a second substack by stacking upon one another at least two of the identical dies with no rotation and no shift in position with respect to other dies in the second substack, personalizing the second substack by blowing one or more same fuses in each die of the second substack thereby converting some TSVs on each die of the second substack into PTVs;

mounting the second substack directly on the first substack with no rotation and no shift in position of the second substack with respect to the first substack, PTVs in the first substack connecting signal lines from the substrate through the first substack to TSVs in the second substack.

11. A method comprising:

transmitting an alternating current signal from a substrate through a first die of the die stack to electronic circuitry in a second die of the die stack, the first die mounted directly upon the substrate, the first die and second die each having a plurality of through silicon vias TSVs, the TSVs connected through fuses to electronic circuitry on each die, wherein a portion of the TSVs of each die are connected to blown fuses and converted to PTVs, the second die mounted upon the first die with respect to the first die so that PTVs in the first die connect signal lines from the substrate through the first die to TSVs in the second die;

conducting, by the first die, the signal through PTVs in the first die to TSVs in the second die;

conducting, by the second die, the signal through TSVs in the second die to the electronic circuitry on the second die; and

conducting the signal through an interface die mounted upon the substrate between the substrate and the first die, the interface die splitting and connecting a same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die.

12. The method of claim 11 wherein the substrate comprises a plurality of conductors connected to conductive pathways in the dies, the conductors including power lines, common lines, and the signal lines.

13. The method of claim 11 further comprising:

wherein conducting the signal through an interface die mounted upon the substrate between the substrate and the first die includes multiplexing and demultiplexing by the interface die the same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the signal lines on the substrate, to the PTVs, and to the TSVs all operating at a same clock speed.

14. The method of claim 11 further comprising:

wherein conducting the signal through an interface die mounted upon the substrate between the substrate and the first die includes multiplexing and demultiplexing by the interface die the same set of signal lines from the substrate to the PTVs on the first die and separately to TSVs on the first die, the substrate operating the signal lines on the substrate at a first clock speed and the interface die operating the signal lines to the PTVs and to the TSVs at a second clock speed, the first clock speed sufficiently faster than the second clock speed to fit onto the signal lines of the interface die all communications between the substrate and the PTVs and the TSVs.

15. The method of claim 11 wherein:

transmitting an alternating current signal from a substrate further comprises transmitting the signal through a first substack of the die stack to electronic circuitry in a second substack of the die stack, the first die substack mounted upon the substrate, the first substack comprising two or more dies manufactured to be initially identical to dies in a second die substack with a number of TSVs, the TSVs connected through fuses to a same circuit on each of the dies of the first substack, the dies of the first substack personalized by blowing on the dies of the first substack a number of same fuses in each die of the first substack, converting the TSVs previously connected through the blown fuses into PTVs, each PTV comprising a conductive pathway through a die with no connection to any circuitry on the die, each of the dies in the first substack stacked directly upon one another with no rotation and no shift in position with respect to one another; and

conducting the signal through PTVs further comprises conducting, by the first die substack, the signal through PTVs of the first die substack to TSVs in the second die substack; and

conducting the signal through TSVs further comprises conducting, by the second substack, the signals through TSVs of the second substack to the electronic circuitry in the second substack, the second substack comprising dies manufactured to be initially identical to the dies of the first substack and later personalized by blowing same fuses in each of the dies of the second substack, each of the dies in the second substack stacked directly upon one another with no rotation and no shift in position with respect to one another, the second substack mounted upon the first substack so that the PTVs in the first substack connect conductors from the substrate through the first substack to TSVs in the second substack.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2019
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 050300/0878 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNMENT DOCUMENT CONTAINING TYPO ERRORS PREVIOUSLY RECORDED AT REEL: 037101 FRAME: 0969. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 28, 2015
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 037689/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2015
From: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
To: LENOVO INTERNATIONAL LIMITED
Reel/Frame 037101/0969 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: LENOVO ENTERPRISE SOLUTIONS (SINGAPORE) PTE. LTD.
Reel/Frame 034194/0111 →