Granted Patent B2

US 9,397,786 · App. 13/569,628 · Granted Jul 19, 2016

Abstract

Claims (44)

1. A system comprising:

a plurality of first forward error correction (FEC) code encoders, each of said first FEC code encoders being configured to encode an associated input signal using a first FEC code and provide an associated first FEC code encoded output;

an interleaver coupled to at least one of said plurality of first FEC code encoders and configured to provide an interleaved output comprising at least a portion of said associated first FEC code encoded output of said at least one of said plurality of first FEC code encoders;

a second FEC code encoder coupled to said interleaver and configured to encode said interleaved output with a second FEC code and provide a second FEC code encoded output;

a modulator coupled to said second FEC code encoder and configured to modulate an optical signal in response to said second FEC code encoded output to provide a modulated output signal;

a second FEC decoder configured to receive a signal representative of said modulated output signal and decode said signal using said second FEC code to provide a second FEC code decoded output signal;

an de-interleaver coupled to said second FEC decoder and configured to provide a plurality of de-interleaved outputs in response to said second FEC code decoded output signal;

a plurality of first FEC code decoders, each of said first FEC code decoders being configured to receive an associated one of said de-interleaved outputs and provide an associated first FEC code decoded output signal;

a multiplexer configured to receive each of said first FEC code decoded output signals and multiplex said first FEC code decoded output signals into a serial output data stream; and

an interleaver configured to interleave said output data stream to provide feedback to the second FEC decoder.

2. A system according to claim 1 , wherein said second FEC code comprises a single parity check (SPC) code.

3. A system according to claim 1 , wherein said first FEC code comprises a low density parity check code (LDPC).

4. A system according to claim 1 , wherein said modulated output signal has a quadrature amplitude modulation (QAM) format.

5. A system according to claim 1 , wherein said first FEC code comprises a low density parity check (LDPC) code and said second FEC code comprises a single parity check (SPC) code.

6. A system according to claim 1 , said system further comprising a Gray mapper coupled to said second FEC code encoder and configured to map said second FEC code encoded output using a Gray code.

7. A system according to claim 1 , said system further comprising a demultiplexer configured to receive a serial input data stream and demultiplex said serial input data stream into a plurality of demultipexed data streams, each of said demultiplexed data streams being coupled to an associated one of said first FEC code encoders as said associated input signal.

8. A system according to claim 1 , wherein said interleaver is coupled to each of said plurality of said first FEC code encoders, and wherein said interleaved output comprises at least a portion of each of said associated first FEC code encoded outputs.

9. An optical signal receiver comprising:

a second forward error correction (FEC) decoder configured to receive an interleaved signal encoded with first and second FEC codes and decode said signal using said second FEC code to provide a second FEC code decoded output signal;

a de-interleaver coupled to said second FEC decoder and configured to provide a plurality of de-interleaved outputs in response to said second FEC code decoded output signal;

a plurality of first FEC code decoders, each of said first FEC code decoders being configured to receive an associated one of said de-interleaved outputs and provide an associated first FEC code decoded output signal;

a multiplexer configured to receive each of said first FEC code decoded output signals and multiplex said first FEC code decoded output signals into a serial output data stream; and

an interleaver configured to interleave said output data stream to provide feedback to the second FEC decoder.

10. A receiver according to claim 9 , wherein said second FEC code comprises a single parity check (SPC) code.

11. A receiver according to claim 9 , wherein said first FEC code comprises a low density parity check code (LDPC).

12. A receiver according to claim 9 , wherein said first FEC code comprises a low density parity check (LDPC) code and said second FEC code comprises a single parity check (SPC) code.

13. A method comprising:

encoding each of a plurality of data streams using a first forward error correction (FEC) code to provide a plurality of first FEC code encoded data streams;

interleaving said first FEC code encoded data streams to provide at least one interleaved output;

encoding said interleaved output using a second FEC code to provide a second FEC code encoded data stream;

modulating an optical signal to provide a modulated output signal representative of said second FEC code encoded data stream;

decoding a signal representative of said modulated output signal using said second FEC code to provide a second FEC code decoded output;

de-interleaving said second FEC code decoded output to provide a plurality of de-interleaved outputs;

decoding said de-interleaved outputs using said first FEC code to provide a plurality of first FEC code decoded outputs;

multiplexing said first FEC code decoded outputs to provide an output data signal;

providing feedback by providing at least a portion of the output data signal for use in said decoding said signal representative of said modulated output signal using said second FEC code; and

iterating said decoding using said second FEC code, said de-interleaving, said decoding using said first FEC code, said multiplexing, and said providing feedback.

14. A method according to claim 13 , said method further comprising

receiving an input signal; and

demultiplexing said input signal to provide said plurality of data streams.

15. A method according to claim 13 , said method further comprising applying a Gray map to said second FEC code encoded data stream.

16. A method according to claim 13 , wherein said second FEC code comprises a single parity check (SPC) code.

17. A method according to claim 13 , wherein said first FEC code comprises a low density parity check code (LDPC).

18. A method according to claim 13 , wherein said providing feedback by providing at least said portion of said output data signal for use in the decoding said signal representative of said modulated output signal using said second FEC code comprises interleaving the output data signal.

Assignments (6)