IP Library Granted Patent US 9,204,553
Granted Patent B2
US 9,204,553 · App. 13/582,149 · Granted Dec 1, 2015

Method for producing a printed circuit board

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Quick Facts
Patent No.
US 9,204,553
App. No.
13/582,149
Granted
Dec 1, 2015
Kind
B2
Abstract

A method is provided for producing a printed circuit board. The method includes the step of providing an insulating substrate having a layer of aluminum material applied to the substrate. A portion of the layer of aluminum material is removed for defining a circuit trace. A layer of conductive material is applied to the layer of aluminum material.

Claims (20)

1. A method for producing a printed circuit board comprising the steps of:

providing an insulating printed circuit board substrate having a clad layer of aluminum disposed thereon;

removing a portion of the clad layer of aluminum for defining circuit traces;

applying a layer of solderable material onto, and in conductive relation with, at least a portion of the clad layer of aluminum using an electroless nickel plating (EN) process; and

applying a layer of conductive material to the layer of solderable material.

2. The method of claim 1 , further including the steps of: cleaning a surface of the clad layer of aluminum to remove contaminates prior to applying the layer of solderable material; activating the surface of the clad layer of aluminum using an etching process prior to applying the layer of solderable material; and treating the surface of the clad layer of aluminum with an alkaline solution prior to applying the layer of solderable material.

3. The method of claim 1 , further comprising the step of applying the layer of conductive material to the layer of solderable material using one of the following processes: electroless nickel immersion gold (ENIG); electroless immersion tin (Im-Sn); electroless immersion silver (Im-Ag); electroless nickel electroless palladium (ENEP); and organic surface protection (OSP).

4. A method for producing a printed circuit board comprising the steps of:

providing an insulating printed circuit board substrate having a layer of aluminum material applied thereto;

removing a portion of the layer of aluminum material for defining a circuit trace;

applying a layer of solderable material onto, and in conductive relation with, at least a portion of the layer of aluminum material; and

applying a layer of conductive material to the layer of solderable material using a plating process.

5. The method of claim 4 , wherein the step of applying a layer of conductive material to the layer of solderable material is performed by using an electroless nickel immersion gold (ENIG) process.

6. The method of claim 4 , wherein the layer of conductive material is applied to the layer of solderable material using one of the following processes: electroless nickel immersion gold (ENIG); electroless immersion tin (Im-Sn); electroless immersion silver (Im-Ag); electroless nickel electroless palladium (ENEP); and organic surface protection (OSP).

7. A method for producing a printed circuit board comprising the steps of:

providing an insulating printed circuit board substrate having a layer of aluminum material applied thereto;

removing a portion of the layer of aluminum material for defining a circuit trace, wherein a channel is defined between adjacent portions of the circuit trace;

applying a layer of solderable material onto, and in conductive relation with, at least a portion of the layer of aluminum material; and

filling a portion of the channel with non-conductive filler material.

8. The method of claim 7 , wherein the portion of the channel having non-conductive filler material provided therein includes non-conductive filler material in an amount such that an outer surface of the filler material in the channel is generally flush with outer surfaces of the adjacent portions of the circuit trace.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Feb 5, 2016
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: LEAR CORPORATION
Reel/Frame 037702/0911 →
SECURITY INTEREST Recorded Mar 20, 2013
From: LEAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 030076/0016 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2012
From: CUBERO PITEL, JOSE ANTONIO; FORES MONTSERRAT, ANDREU; TORRIJOS EZQUERRA, MARIA LEONOR
To: LEAR CORPORATION
Reel/Frame 028882/0106 →