Power amplifier circuit
View Patent ↗A power amplifier circuit, comprising: an input for receiving an input signal to be amplified; a power supply; an amplifier, coupled to the input and the power supply; and a cascode device coupled between the power supply and the amplifier. The circuit is characterized by: a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (CTAT).
1. A power amplifier circuit, comprising:
an input for receiving an input signal to be amplified;
a power supply;
an amplifier, coupled to the input and the power supply; and
a cascode device coupled between the power supply and the amplifier;
characterized by:
a first current source coupled between the input and the amplifier, configured to provide a biasing current which is proportional to absolute temperature; and
a second current source for controlling the cascode device, configured to provide a current which is complementary to absolute temperature (CTAT).
2. The power amplifier circuit according to claim 1 , wherein the biasing current is proportional to absolute temperature with a proportionality constant equal to (1+β), where β is a positive number, and wherein the CTAT current is complementary to absolute temperature.
3. The power amplifier circuit according to claim 2 , wherein β is variable.
4. The power amplifier circuit according to claim 2 or 3 , further comprising a third current source for generating a current which is proportional to absolute temperature (PTAT).
5. The power amplifier circuit according to claim 4 , wherein the first current source is configured to generate the biasing current by generating a current equal to β.I PTAT and subtracting the CTAT current.
6. The power amplifier circuit according to claim 5 , wherein the first current source comprises a current mirror having at least two transistors, at least one of said transistors having a variable aspect ratio for varying a device ratio in order to vary β.
7. The power amplifier circuit according to any one of claims 4 to 6 , wherein the CTAT current is generated by subtracting the PTAT current from a reference current.
8. The power amplifier circuit according to claim 7 , further comprising a bandgap voltage circuit for generating the reference current.
9. The power amplifier circuit according to any one of claims 4 to 8 , wherein the third current source comprises a ΔV GS voltage drop across a resistor (R B ).
10. The power amplifier circuit according to claim 9 , wherein the resistor comprises a plurality of resistive elements and one or more switches for short-circuiting one or more of said resistive elements.
11. The power amplifier circuit according to any one of claims 4 to 10 , wherein the third current source comprises a current mirror having at least two transistors, at least one of said transistors having a variable aspect ratio for varying a device ratio and thus varying the PTAT current.
12. The power amplifier circuit according to any one of the preceding claims, wherein the amplifier comprises a transistor.
13. The power amplifier circuit according to any one of the preceding claims, wherein the second current source is coupled to a gate terminal of the cascode device.
14. The power amplifier circuit according to any one of the preceding claims, wherein the amplifier comprises first and second transistors, and wherein the circuit further comprises a second cascode device also controlled by the second current source, the first cascode device being coupled between the first transistor and the power supply, and the second cascode device being coupled between the second transistor and the power supply.
15. A transmitter, comprising a power amplifier circuit according to any one of the preceding claims and an antenna coupled to the power amplifier circuit.