IP Library Granted Patent US 9,619,282
Granted Patent B2
US 9,619,282 · App. 13/590,467 · Granted Apr 11, 2017

Task scheduling in big and little cores

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Quick Facts
Patent No.
US 9,619,282
App. No.
13/590,467
Granted
Apr 11, 2017
Kind
B2
Abstract

One aspect provides a method including: identifying a task to be scheduled for execution on an information handling device having two or more cores of different size; determining an appropriate scheduling of the task for execution on the two or more of cores of different size, wherein the appropriate scheduling of the task is determined via a core signature for the task; directing the task to an appropriate core for execution based on the appropriate scheduling determined; and executing the task on the appropriate core. Other aspects are described and claimed.

Claims (35)

1. A method comprising:

identifying a task to be scheduled for execution on an information handling device having two or more cores of different size;

determining an appropriate scheduling of the task for execution on the two or more of cores of different size, wherein the appropriate scheduling of the task is determined via a core signature for the task, wherein the core signature is determined via a procedure comprising: determining if the task fits on a little core; determining if the task is high priority; and determining if the task is executable on the little core within a threshold tolerance with respect to little core utilization;

directing the task to an appropriate core for execution based on the appropriate scheduling determined; and

executing the task on the appropriate core.

2. The method of claim 1 , wherein a big core of the cores of different size is a high power central processing unit, and further wherein a little core of the cores of different size is a lower power central processing unit with respect to the big core.

3. The method of claim 1 , wherein the core signature comprises a tracked execution history.

4. The method of claim 1 , wherein the core signature comprises an ascertained task characteristic.

5. The method of claim 4 , wherein the ascertained task characteristic comprises a characteristic indicating that the task is a high priority task.

6. The method of claim 1 , wherein the core signature is programmed for the task and comprises a hint associated with the entire task.

7. The method of claim 1 , wherein the core signature is programmed for the task and comprises a hint associated with a sub-component of the task.

8. The method of claim 1 , wherein the core signature is programmed for the task and is static.

9. The method of claim 1 , wherein the core signature is programmed for the task and is dynamically updated during execution of the task.

10. An information handling device, comprising:

one or more processors; and

a memory in communication with the one or more processors;

the memory storing program instructions that when executed by the one or more processors:

identify a task to be scheduled for execution on an information handling device having two or more cores of different size;

determine an appropriate scheduling of the task for execution on the two or more of cores of different size, wherein the appropriate scheduling of the task is determined via a core signature for the task, wherein the core signature is determined via a procedure comprising: determining if the task fits on a little core; determining if the task is high priority; and determining if the task is executable on the little core within a threshold tolerance with respect to little core utilization;

direct the task to an appropriate core for execution based on the appropriate scheduling determined; and

execute the task on the appropriate core.

11. The information handling device of claim 10 , wherein a big core of the cores of different size is a high power central processing unit, and further wherein a little core of the cores of different size is a lower power central processing unit with respect to the big core.

12. The information handling device of claim 10 , wherein the core signature comprises a tracked execution history.

13. The information handling device of claim 10 , wherein the core signature comprises an ascertained task characteristic.

14. The information handling device of claim 13 , wherein the ascertained task characteristic comprises a characteristic indicating that the task is a high priority task.

15. The information handling device of claim 10 , wherein the core signature is programmed for the task and comprises a hint associated with the entire task.

16. The information handling device of claim 10 , wherein the core signature is programmed for the task and comprises a hint associated with a sub-component of the task.

17. The information handling device of claim 10 , wherein the core signature is programmed for the task and is static.

18. The information handling device of claim 10 , wherein the core signature is programmed for the task and is dynamically updated during execution of the task.

19. A program product, comprising:

a storage device having program code embodied therewith, the program code comprising:

program code configured to identify a task to be scheduled for execution on an information handling device having two or more cores of different size;

program code configured to determine an appropriate scheduling of the task for execution on the two or more of cores of different size, wherein the appropriate scheduling of the task is determined via a core signature for the task, wherein the core signature is determined via a procedure comprising: determining if the task fits on a little core; determining if the task is high priority; and determining if the task is executable on the little core within a threshold tolerance with respect to little core utilization;

program code configured to direct the task to an appropriate core for execution based on the appropriate scheduling determined; and

program code configured to execute the task on the appropriate core.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2025
From: LENOVO PC INTERNATIONAL LIMITED
To: LENOVO SWITZERLAND INTERNATIONAL GMBH
Reel/Frame 069870/0670 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2019
From: LENOVO (SINGAPORE) PTE. LTD.
To: LENOVO PC INTERNATIONAL LIMITED
Reel/Frame 049693/0474 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2012
From: DAVIS, MARK C.; CROMER, DARYL C.; LOCKER, HOWARD J.; KELSO, SCOTT E.
To: LENOVO (SINGAPORE) PTE. LTD.
Reel/Frame 028842/0686 →