IP Library Patent Application 13592943
Patent Application
App. No. 13/592,943

SOLID-STATE IMAGING DEVICE AND CAMERA

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Patent No.
US None
App. No.
13/592,943
Abstract

The present invention implements a solid-state imaging device and a camera which develop lower noise. The solid-state imaging device includes unit cells which are arranged in two dimensions. Each of the unit cells includes: a photoelectric converting element which photoelectrically converts incident light; and amplifying transistors each of which outputs a signal voltage according to signal charges of the photoelectric converting element. The photoelectric converting element is electrically connected in common with gates of the amplifying transistors.

Claims (37)

1 . A solid-state imaging device comprising

unit cells which are arranged in two dimensions and each of which includes:

a photoelectric converting element which photoelectrically converts incident light; and

amplifying transistors each of which has a gate that receives a voltage according to signal charges accumulated in the photoelectric converting element.

2 . The solid-state imaging device according to claim 1 ,

wherein the unit cell includes photoelectric converting elements including the photoelectric converting element, and

the photoelectric converting elements share the amplifying transistors.

3 . The solid-state imaging device according to claim 1 ,

wherein the unit cell includes a transfer transistor which is provided between (i) the photoelectric converting element and (ii) gates of the amplifying transistors.

4 . The solid-state imaging device according to claim 1 ,

wherein the amplifying transistors share one of a source region and a drain region.

5 . The solid-state imaging device according to claim 4 ,

wherein, with respect to the shared one of the source region and the drain region for the amplifying transistors, a direction of a current flow between the source region and the drain region of one of the amplifying transistors and a direction of a current flow between the source region and the drain region of another one of the amplifying transistors are symmetrical.

6 . The solid-state imaging device according to claim 1 ,

wherein, in each of the unit cells that are neighboring with each other, the amplifying transistors share one of a source region and a drain region.

7 . The solid-state imaging device according to claim 1 ,

wherein the unit cell includes a reset transistor which resets a potential of the gate of each of the amplifying transistors.

8 . The solid-state imaging device according to claim 1 ,

wherein all of drain regions and source regions for the amplifying transistors are arranged in a line.

9 . The solid-state imaging device according to claim 1 ,

wherein the gates of the amplifying transistors are same in width.

10 . The solid-state imaging device according to claim 1 ,

wherein the gates of the amplifying transistors are same in length.

11 . The solid-state imaging device according to claim 1 ,

wherein the amplifying transistors share a gate.

12 . The solid-state imaging device according to claim 1 ,

wherein the gates of the amplifying transistors are connected to each other via a signal line.

13 . The solid-state imaging device according to claim 1 , further comprising

a signal line which is connected to the unit cells and transmits a signal voltage outputted from the unit cells,

wherein source regions of the amplifying transistors are connected to the signal line.

14 . A camera comprising:

a first chip on which a solid-state imaging device is formed, the solid-state imaging device including (i) unit cells arranged in two dimensions, and (ii) an AD conversion circuit which converts voltage signals, outputted from the unit cells, into digital signals; and

a second chip on which a digital signal processing circuit is formed, the digital signal processing circuit processing the digital signals outputted from the first chip,

wherein each of the unit cells includes:

a photoelectric converting element which photoelectrically converts incident light;

a transfer transistor which reads signal charges accumulated in the photoelectric converting element; and

amplifying transistors each of which has a gate that receives a voltage according to signal charges accumulated in the photoelectric converting element.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERRONEOUSLY FILED APPLICATION NUMBERS 13/384239, 13/498734, 14/116681 AND 14/301144 PREVIOUSLY RECORDED ON REEL 034194 FRAME 0143. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Dec 24, 2020
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 056788/0362 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 10, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 034194/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2012
From: MURAKAMI, MASASHI; OHTSUKI, HIROHISA; IKUMA, MAKOTO
To: PANASONIC CORPORATION
Reel/Frame 029440/0824 →