Light-emitting device having a roughened surface with different topographies
View Patent ↗This invention provides an optoelectronic semiconductor device having a rough surface and the manufacturing method thereof. The optoelectronic semiconductor device comprises a semiconductor stack having a rough surface and an electrode layer overlaying the semiconductor stack. The rough surface comprises a first region having a first topography and a second region having a second topography. The method comprises the steps of forming a semiconductor stack on a substrate, forming an electrode layer on the semiconductor stack, thermal treating the semiconductor stack, and wet etching the surface of the semiconductor stack to form a rough surface.
1. A method of forming an optoelectronic semiconductor device, comprising the steps of:
preparing a semiconductor stack;
forming an electrode layer on a portion of the semiconductor stack; proceeding a thermal treatment; and
roughing another portion of the semiconductor stack not covered by the electrode layer after the thermal treatment, wherein the roughing step comprises forming a first region having a first rough topography and a second region having a second rough topography different to the first rough topography.
2. The method of claim 1 , wherein the roughing step comprises forming the second region closer to the electrode layer than the first region.
3. The method of claim 1 , wherein the roughing step comprises forming the first rough topography having a dimension smaller than the second rough topography.
4. The method of claim 1 , wherein the roughing step comprises forming the first region separated from the electrode layer.
5. The method of claim 1 , wherein the roughing step comprises forming the second region having an outline similar to the electrode layer.
6. The method of claim 1 , wherein the roughing step comprises forming the second region substantially surrounding the electrode layer.
7. The method of claim 1 , wherein the roughing step comprises forming the second region substantially lower than the first region.
8. The method of claim 1 , wherein the roughing step comprises forming the second region having a cross section with a curved shape.
9. The method of claim 1 , wherein the roughing step comprises forming the second region having a wave-shape surface.
10. The method of claim 1 , wherein the roughing step comprises forming the second region outward oblique from the electrode layer.
11. The method of claim 1 , wherein the roughing step comprises forming the second region not covered by the electrode layer.
12. The method of claim 1 , wherein the roughing step comprises etching the semiconductor stack by an etching solution.
13. The method of claim 1 , wherein the thermal treatment step is applied to at least one of the semiconductor stack and the electrode layer.
14. The method of claim 1 , wherein the roughing step is performed at a temperature substantially not greater than 60° C.
15. The method of claim 1 , wherein the thermal treatment comprises a rapid thermal annealing step.
16. The method of claim 1 , wherein the forming the electrode layer step comprises forming one or more metal layers.
17. The method of claim 1 , wherein the roughing step comprises forming the first region being substantially separated from the electrode layer.
18. The method of claim 1 , wherein the roughing step comprises forming the second region having an outline similar to the electrode layer.
19. The method of claim 1 , wherein the roughing step comprises forming the second region being outward oblique from the electrode layer.