IP Library Granted Patent US 8,972,834
Granted Patent B2
US 8,972,834 · App. 13/596,846 · Granted Mar 3, 2015

System and method for communicating with low density parity check codes

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Quick Facts
Patent No.
US 8,972,834
App. No.
13/596,846
Granted
Mar 3, 2015
Kind
B2
Abstract

The present invention provides a low density parity check (LDPC) code system and method of using such a system. A transmitted LDPC code block size may be chosen such that the minimum transmitted block size is minimized. Further, the system provides for intermediate LDPC code block size support. Finally, a common decoder architecture may be used to decode different LDPC code rates and block sizes.

Claims (27)

1. An apparatus comprising:

an encoder configured to encode information bit strings into one or more respective low density parity check (LDPC) code blocks, each LDPC code block being of a bit length S 1 ; and

a controller,

wherein, when a string of information bits of a bit length k is to be encoded into a code block of length N , and N<S 1 , the controller is configured to control the encoder to at least one of pad, shorten, puncture or repeat a bit within one of the string of information bits to be encoded and associated parity bits to generate an encoded LDPC code block of a bit length S 1 , and

wherein the encoder is further configured to encode the string of information bits into the one or more respective LDPC code blocks such that punctured bits are chosen among parity bits for LDPC code rates within the group consisting of 1/2, 2/3, 4/5, 3/4 and 5/6.

2. An apparatus comprising:

an encoder configured to encode information bit strings into one or more respective low density parity check (LDPC) code blocks, each LDPC code block being of a bit length S 1 ; and

a controller,

wherein, when a string of information bits of a bit length k is to be encoded into a code block of length N , and N<S 1 , the controller is configured to control the encoder to at least one of pad, shorten, puncture or repeat a bit within one of the string of information bits to be encoded and associated parity bits to generate an encoded LDPC code block of a bit length S 1 , and

wherein the encoder is further configured to encode the string of information bits into the one or more respective LDPC code blocks such that punctured bits are chosen among information bits for LDPC code rates within the group consisting of 8/9 and 9/10.

3. A method comprising:

receiving, via a receiving portion, a code block;

when the code block is of a bit length equal to a first low density parity check (LDPC) code block, the method further comprises storing the code block as a first data structure, and decoding the code block based on a first address table, wherein the first address table relates a structure of the first LDPC code block to the first data structure;

when the code block is of a bit length equal to a second low density parity check (LDPC) code block, different than the bit length of the first LDPC code block, storing the code block as a second data structure, and decoding the code block based on a second address table, wherein the second address table relates a structure of the second LDPC code block to the second data structure.

4. A method comprising:

encoding, via an encoder, information bit strings into one or more respective low density parity check (LDPC) code blocks, each of the LDPC code blocks being of a bit length S 1 ; and

when a string of information bits of a bit length k is to be encoded into a code block of length N , and N<S 1 , performing at least one of padding, shortening, puncturing or repeating a bit within one of the string of information bits to be encoded and associated parity bits to generate an encoded LDPC code block of a bit length S 1 , and

wherein said performing shortening, puncturing or repeating a bit within one of the string of information bits and the associated parity bits comprises encoding the string of information bits into the one or more respective LDPC code blocks such that punctured bits are chosen among parity bits for LDPC code rates within the group consisting of 1/2, 2/3, 4/5, 3/4 and 5/6.

5. A method comprising:

encoding, via an encoder, information bit strings into one or more respective low density parity check (LDPC) code blocks, each of the LDPC code blocks being of a bit length S 1 ; and

when a string of information bits of a bit length k is to be encoded into a code block of length N , and N<S 1 , performing at least one of padding, shortening, puncturing or repeating a bit within one of the string of information bits to be encoded and associated parity bits to generate an encoded LDPC code block of a bit length S 1 , and

wherein said performing shortening, puncturing or repeating a bit within one of the string of information bits and the associated parity bits comprises encoding the string of information bits into the one or more respective LDPC code blocks such that punctured bits are chosen among information bits for LDPC code rates within the group consisting of 8/9 and 9/10.

6. An apparatus comprising:

a receiver module configured to receive a code block; and

a processor module,

wherein, when the code block is of a bit length equal to a first low density parity check (LDPC) code block, the processor is configured to control storage of the code block as a first data structure, and to decode the code block based on a first address table, wherein the first address table relates a structure of the first LDPC code block to the first data structure, and

wherein, when the code block is of a bit length equal to a second low density parity check (LDPC) code block, different than the bit length of the first LDPC code block, the processor is configured to control storage of the code block as a second data structure, and to decode the code block based on a second address table, wherein the second address table relates a structure of the second LDPC code block to the second data structure.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION NUMBER 15649418 PREVIOUSLY RECORDED ON REEL 050600 FRAME 0314. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT OF PATENT SECURITY AGREEMENTS. Recorded Sep 3, 2020
From: WELLS FARGO, NATIONAL BANK ASSOCIATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 053703/0367 →
ASSIGNMENT OF PATENT SECURITY AGREEMENTS Recorded Oct 1, 2019
From: WELLS FARGO BANK, NATIONAL ASSOCIATION
To: U.S. BANK NATIONAL ASSOCIATION
Reel/Frame 050600/0314 →
SECURITY INTEREST Recorded Feb 18, 2016
From: HUGHES NETWORK SYSTEMS LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION - AS COLLATERAL AGENT
Reel/Frame 037847/0440 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2012
From: EROZ, MUSTAFA; LEE, LIN-NAN
To: HUGHES NETWORK SYSTEMS, LLC
Reel/Frame 028862/0464 →