Nonvolatile memory element and nonvolatile memory device
View Patent ↗A nonvolatile memory element includes: a first electrode layer; a second electrode layer; and a variable resistance layer which is placed between the electrode layers, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a polarity of a voltage applied between the electrode layers. The variable resistance layer is formed by stacking a first oxide layer including an oxide of a first transition metal and a second oxide layer including an oxide of a second transition metal which is different from the first transition metal. At least one of the following conditions is satisfied: (1) a dielectric constant of the second oxide layer is larger than a dielectric constant of the first oxide layer; and (2) a band gap of the second oxide layer is smaller than a band gap of the first oxide layer.
1. A variable resistance nonvolatile memory element comprising:
a first electrode;
a second electrode; and
a variable resistance layer which is placed between said first electrode and said second electrode, and whose resistance state reversibly changes between a high resistance state and a low resistance state based on a voltage applied between said first electrode and said second electrode,
wherein said nonvolatile memory element has a characteristic of changing into a state where the resistance state can change after an initial break is performed when said nonvolatile memory element is in an initial state, the initial break applying a voltage to said nonvolatile memory element, and the initial state being a state where said nonvolatile memory element has a resistance value higher than a resistance value of said nonvolatile memory element of which said variable resistance layer is in the high resistance state, and
said variable resistance layer has a stacked structure of a first oxide layer and a second oxide layer, said first oxide layer including an oxygen-deficient oxide of a first metal, and said second oxide layer including an oxide of a second metal which is different from said first metal, and said second oxide layer having a resistivity higher than a resistivity of said first oxide layer.
2. The variable resistance nonvolatile memory element according to claim 1 , wherein a degree of oxygen deficiency of said first oxide layer is greater than a degree of oxygen deficiency of said second oxide layer.
3. The variable resistance nonvolatile memory element according to claim 1 , wherein the initial break applies, to said nonvolatile memory element, the voltage with a load element connected to said nonvolatile memory element.
4. The variable resistance nonvolatile memory element according to claim 1 , wherein each of said first metal and said second metal is a transition metal.
5. The variable resistance nonvolatile memory element according to claim 1 , wherein each of said first metal and said second metal is selected from a group including Sr, Al, Ti, Hf, Zr, Nb, Ta, W, Co, Ni, Fe, and Cu.
6. The variable resistance nonvolatile memory element according to claim 1 , wherein a conduction band offset value of said second oxide layer is larger than a conduction band offset value of said first oxide layer.
7. The variable resistance nonvolatile memory element according to claim 1 , wherein a standard electrode potential of said second metal is lower than a standard electrode potential of said first metal.
8. The variable resistance nonvolatile memory element according to claim 1 , wherein a dielectric constant of said second oxide layer is larger than a dielectric constant of said first oxide layer.
9. The variable resistance nonvolatile memory element according to claim 1 , wherein a band gap of said second oxide layer is smaller than a band gap of said first oxide layer.
10. The variable resistance nonvolatile memory element according to claim 1 , wherein both of the following conditions are satisfied: (1) a dielectric constant of said second oxide layer is larger than a dielectric constant of said first oxide layer; and (2) a band gap of said second oxide layer is smaller than a band gap of said first oxide layer.
11. The variable resistance nonvolatile memory element according to claim 1 , wherein said second electrode is formed in contact with said second oxide layer, and a standard electrode potential of said second electrode is higher than a standard electrode potential of said second metal.
12. The variable resistance nonvolatile memory element according to claim 1 , wherein a standard electrode potential of said first metal is lower than a standard electrode potential of said second electrode.
13. The variable resistance nonvolatile memory element according to claim 1 , wherein a thickness of said second oxide layer is less than a thickness of said first oxide layer.
14. The variable resistance nonvolatile memory element according to claim 1 , wherein said second metal is Ti, Sr, or Nb.
15. The variable resistance nonvolatile memory element according to claim 1 , wherein said first metal is Ta.
16. The variable resistance nonvolatile memory element according to claim 1 , further comprising a load element which is electrically connected to said nonvolatile memory element.
17. The variable resistance nonvolatile memory element according to claim 16 , wherein said load element is a fixed resistor, a transistor, or a diode.
18. A nonvolatile memory device comprising:
a semiconductor substrate;
first wires formed parallel to each other on said semiconductor substrate;
second wires formed above said first wires so as to be parallel to each other on a plane parallel to a principal plane of said semiconductor substrate and to three-dimensionally cross said first wires;
a memory cell array which includes nonvolatile memory elements including the nonvolatile memory element of claim 1 , the nonvolatile memory elements each being provided to correspond to one of cross-points between said first wires and said second wires;
a selection circuit which selects at least one of the nonvolatile memory elements included in said memory cell array;
a write circuit which writes data by applying a voltage to the selected nonvolatile memory element; and
a readout circuit which reads the data by detecting a resistance value of the selected nonvolatile memory element.
19. The variable resistance nonvolatile memory element according to claim 18 , further comprising:
a current controlling element which is electrically connected to each of the nonvolatile memory elements.
20. A nonvolatile memory device comprising:
a semiconductor substrate;
word lines and bit lines which are formed above said semiconductor substrate;
transistors each of which is connected to corresponding ones of said word lines and said bit lines;
a memory cell array which includes nonvolatile memory elements including the nonvolatile memory element of claim 1 , the nonvolatile memory elements being provided to correspond to said transistors on a one-on-one basis;
a selection circuit which selects at least one of the nonvolatile memory elements included in said memory cell array;
a write circuit which writes data by applying a voltage to the selected nonvolatile memory element; and
a readout circuit which reads the data by detecting a resistance value of the selected nonvolatile memory element.