Storage device
View Patent ↗A nonvolatile memory is configured with blocks as deletion units, each block having several pages that are configured as write units. A controller for the nonvolatile memory includes an error correcting circuit, which detects and corrects an error in data read out of a page in one of the blocks of the nonvolatile memory, the page being referenced by a logical address. The controller also determines an error occurrence when the error cannot be corrected. An error block table is provided to store the logical address where the error occurred, and a physical address corresponding to the logical address.
1. A storage device comprising:
a nonvolatile memory having multiple blocks, each block including multiple pages;
an error correcting circuit that is configured to detect and correct an error in data read out from a block of the nonvolatile memory at a location referenced by a logical address and issue a notification of an error occurrence when the error cannot be corrected; and
a processing circuit for controlling the operations of the error correcting circuit and the nonvolatile memory, wherein
when the notification of the error occurrence is received from the error correcting circuit for the data read out of a page in a first block of the nonvolatile memory, the processing circuit records a physical address of the page in the first block in a free part of a page in a second block of the nonvolatile memory into which the read data are to be written.
2. The storage device according to claim 1 , wherein
when the notification of the error occurrence is received from the error correcting circuit, the processing circuit further records the physical address, which has been registered in a free part of the page in the first block, in the free part of the page in the second block.
3. The storage device according to claim 1 , wherein
when the notification of the error occurrence is received from the error correcting circuit, the processing circuit records the physical address of the page in the first block in the free part of the page in the second block of the nonvolatile memory into which the read data are written without determining whether or not the error is an actual error.
4. The storage device according to claim 1 , wherein
when the notification of the error occurrence is received from the error correcting circuit, the processing circuit determines whether or not the error is an actual error and records the physical address of the page in the first block in the free part of the page in the second block of the nonvolatile memory into which the read data are written if the error is an actual error.
5. The storage device according to claim 4 , wherein the processing circuit determines that the error is not an actual error if the physical address of the page in the first block is indicated as associated with an uncorrectable error occurrence in the past.
6. The storage device according to claim 4 , wherein the processing circuit determines that the error is an actual error if the physical address of the page in the first block is not indicated as associated with an uncorrectable error occurrence in the past.
7. The storage device according to claim 1 , wherein when the notification of the error occurrence is received from the error correcting circuit for the data read out of the page in the first block of the nonvolatile memory, the processing circuit records a physical address recorded in a free part of the page in the first block in the free part of the page in the second block of the nonvolatile memory into which the read data are to be written.