Memory device, control method for the memory device, and controller
View Patent ↗During normal power operation, an erased free block is prepared in nonvolatile memory so that at least one erased free block is continuously available as a standby block. If a power failure occurs, volatile data and its address conversion information are written into the standby block in the nonvolatile memory.
1. A memory device comprising:
a volatile memory;
a nonvolatile memory;
a power source circuit with a power backup configured to temporarily supply power to various parts of the memory device when a power outage to the power source circuit is detected; and
a controller configured to:
perform write operations on the nonvolatile memory in units of blocks;
continuously maintain one of the blocks as a designated block for storing contents of the volatile memory during the power outage; and
after the power outage to the power source circuit is detected, interrupt a process of reading data from the nonvolatile memory, wherein interrupting the process of reading data from the nonvolatile memory comprises allowing the reading of a data block that is currently in progress to continue and preventing the reading of any other data blocks.
2. The memory device according to claim 1 , wherein the controller is further configured, after the power outage to the power source circuit is detected, to write data residing in the volatile memory to the designated block, the data written to the designated block corresponding to a write completion notification sent to a host of the memory device after the power outage is detected.
3. The memory device according to claim 2 , wherein the controller is further configured, when starting up after power outage, to complete a write procedure associated with the write completion notification.
4. The memory device according to claim 3 , wherein the controller is further configured to provide, prior to completing the write procedure associated with the write completion notification, an erasable free block as a designated block for storing contents of the volatile memory during power outage.
5. The memory device according to claim 1 , wherein the controller is further configured, after the power outage to the power source circuit is detected, to interrupt at least one of the following processes: erasing data from the nonvolatile memory, writing data to the nonvolatile memory, updating an address conversion table that maps logical block addresses to physical locations in the nonvolatile memory, and performing error correction.
6. The memory device according to claim 1 , wherein the controller is further configured, when starting up after power outage, to:
read data stored in a data block of the nonvolatile memory prior to detection of the power outage to the power source circuit;
read data stored in the designated block after the power outage to the power source circuit; and
write the data read from the data block and the data read from the designated block together in a single block of the nonvolatile memory.
7. The memory device according to claim 1 , wherein the contents of the volatile memory comprise at least one of information for mapping logical block addresses from a host of the memory device to physical memory locations in the nonvolatile memory; user data associated with a write command from the host of the memory device; and address conversion information for updating the information for mapping logical block addresses from the host of the memory device to physical addresses in the nonvolatile memory.
8. The memory device according to claim 1 , wherein the designated block for storing contents of the volatile memory during power outage comprises an erased free block.
9. The memory device according to claim 1 , wherein continuously maintaining one of the blocks as a designated block comprises, during power outage, erasing a free block in the nonvolatile memory prior to storing contents of the volatile memory in the designated block.
10. A control method for a memory device that includes a volatile memory, a nonvolatile memory, and a read/write controller that performs read and write operations on memory blocks in the nonvolatile memory, the method comprising:
continuously maintaining at least one of the memory blocks as a designated block for storing contents of the volatile memory during a power outage; and
after a power outage to a power source circuit of the memory device is detected, wherein said power source circuit includes a power backup configured to supply power to various parts of the memory device when the power outage is detected, interrupting a process of reading data from the nonvolatile memory,
wherein interrupting the process of reading data from the nonvolatile memory comprises allowing the reading of a data block that is currently in progress to continue and preventing the reading of any other data blocks.
11. The method according to claim 10 , further comprising:
during a recovery from a power outage and before writing contents of the volatile memory to the nonvolatile memory, erasing one of the memory blocks; and
designating the erased memory block as a memory block for storing contents of the volatile memory during power outage.
12. A memory device comprising:
a volatile memory;
a nonvolatile memory;
a controller configured to perform write operations on the nonvolatile memory in units of blocks and continuously maintain one of the blocks as a designated block for storing contents of the volatile memory during a power outage,
wherein the controller maintains multiple blocks as designated blocks for storing contents of the volatile memory during the power outage and one of the multiple blocks comprises an erased free block configured to store control information indicating completion of a power outage recovery process.
13. The memory device according to claim 12 , wherein one of the multiple blocks comprises an erased free block configured to store information mapping logical block addresses from a host of the memory device to physical addresses in the nonvolatile memory.
14. The memory device according to claim 12 , wherein one of the multiple blocks comprises an erased free block configured to store a final writing of user data that are included in the contents of the volatile memory after power outage.
15. The memory device according to claim 12 , wherein one of the multiple blocks comprises an erased free block configured to store address conversion information for updating the information mapping logical block addresses from the host of the memory device to physical addresses in the nonvolatile memory.
16. A control method for a memory device that includes a volatile memory, a nonvolatile memory, and a read/write controller that performs read and write operations on memory blocks in the nonvolatile memory, the method comprising:
maintaining multiple memory blocks for storing contents of the volatile memory during a power outage, wherein one of the multiple blocks comprises an erased free block configured to store control information indicating completion of a power outage recovery process.