Programmable wavelet tree
An apparatus is provided. In the apparatus, a demultiplexer is configured to receive an input signal, and each of a plurality of sample buffers are coupled to the demultiplexer. A first multiplexer is coupled to each of the sample buffers. A filter is coupled to the first multiplexer. A bypass delay circuit is coupled to the first multiplexer, and a second multiplexer is coupled to the filter and the bypass delay circuit.
1. An apparatus comprising:
a demultiplexer that is configured to receive an input signal;
a plurality of sample buffers, wherein each sample buffer is coupled to the demultiplexer;
a first multiplexer that is coupled to each of the sample buffers;
a filter that is coupled to the first multiplexer;
a bypass delay circuit that is coupled to the first multiplexer;
a second multiplexer that is coupled to the filter and the bypass delay circuit; and
wherein the filter further comprises:
a multiply-accumulate (MAC) circuit that is coupled between the first and second multiplexers; and
a coefficient circuit that is coupled to the MAC circuit.
2. The apparatus of claim 1 , wherein the coefficient circuit further comprises:
a first coefficient generator;
a second coefficient generator; and
a third multiplexer that is coupled to the first and second coefficient generators and the MAC circuit.
3. The apparatus of claim 2 , wherein the apparatus further comprises a bypass enable table that is configured to control the second multiplexer.