System and method for switching in an energy efficient network
View Patent ↗A system and method for switching in an energy efficient network. Rapid switching between multiple operating modes can generate a voltage spike or voltage lag on an on-board inductor. Suppression of the voltage spike or voltage lag can be enabled through the activation of by a physical layer device of an inductor bypass path at a time proximate to the switching between multiple operating modes.
1. A system, comprising:
a physical layer device that supports first and second operating modes that consume different amounts of power, said physical layer device also generating a control signal proximate to a time of transition between said first and second operating modes;
a power supply that supplies power to said physical layer device, said power supply being coupled to said physical layer device via an inductor; and
a bypass module, a first end of said bypass module being coupled to a first end of said inductor, and a second end of said bypass module being coupled to a second end of said inductor, said bypass module being activated by said control signal to create a bypass path for current produced during said transition of said physical layer device between said first and second operating modes.
2. The system of claim 1 , wherein said bypass module includes a field effect transistor.
3. The system of claim 1 , wherein said first operating mode is a 10G operating mode and said second operating mode is a 1G or lower operating mode.
4. The system of claim 1 , wherein said first operating mode is an active mode and said second operating mode is an energy saving mode.
5. The system of claim 4 , wherein said energy saving mode is a low power idle mode.
6. The system of claim 4 , wherein said energy saving mode is a subset physical layer device mode.
7. The system of claim 1 , wherein said control signal activates said bypass module during a time period that covers said transition between said first and second operating modes.
8. A physical layer device, comprising:
a controller that enables switching between first and second operating modes supported by the physical layer device, said first and second operating modes consuming different amounts of power, said power being provided by a power supply that is coupled to said physical layer device via an inductor; and
a control signal pin, said control signal pin carrying a control signal generated by said controller, said control signal being used to reduce an amount of current that flows through said inductor during a transition between said first and second operating modes.
9. The physical layer device of claim 8 , wherein said control signal is used to activate a bypass module that is coupled to said inductor.
10. The physical layer device of claim 8 , wherein said first operating mode is a 10G operating mode and said second operating mode is a 1G or lower operating mode.
11. The physical layer device of claim 8 , wherein said first operating mode is an active mode and said second operating mode is an energy saving mode.
12. The physical layer device of claim 11 , wherein said energy saving mode is a low power idle mode.
13. The physical layer device of claim 11 , wherein said energy saving mode is a subset physical layer device mode.
14. A method, comprising:
generating a control signal by a device that supports a first operating mode and a second operating mode that consume different amounts of power, said device receiving power from a power supply that is coupled to said device via an inductor, said control signal being proximate in time to a transition between said first operating mode and said second operating mode;
receiving said control signal in a bypass module, said bypass module being coupled to said inductor; and
activating said bypass module in response to said generated control signal, wherein activation of said bypass module creates a bypass path that reduces a flow of current through said inductor during said transition of said device between said first operating mode and said second operating mode.
15. The method of claim 14 , wherein said bypass module includes a field effect transistor.
16. The method of claim 14 , wherein said first operating mode is a 10G operating mode and said second operating mode is a 1G or lower operating mode.
17. The method of claim 14 , wherein said first operating mode is an active mode and said second operating mode is an energy saving mode.
18. The method of claim 17 , wherein said energy saving mode is a low power idle mode.
19. The method of claim 17 , wherein said energy saving mode is a subset physical layer device mode.
20. The method of claim 14 , wherein said control signal activates said bypass module during a time period that covers said transition between said first and second operating modes.