IP Library Granted Patent US 8,779,845
Granted Patent B2
US 8,779,845 · App. 13/604,500 · Granted Jul 15, 2014

Semiconductor apparatus

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Quick Facts
Patent No.
US 8,779,845
App. No.
13/604,500
Granted
Jul 15, 2014
Kind
B2
Abstract

A semiconductor apparatus includes a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal; a first pumping voltage generation unit configured to perform a pumping operation during an enable period of the first pumping enable signal and generate a first pumping voltage; and a second pumping voltage generation unit configured to perform a pumping operation during an enable period of the second pumping enable signal and generate a second pumping voltage.

Claims (59)

1. A semiconductor apparatus comprising:

a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal;

a first pumping voltage generation unit configured to perform a pumping operation during an enable period of the first pumping enable signal and generate a first pumping voltage; and

a second pumping voltage generation unit configured to perform a pumping operation during an enable period of the second pumping enable signal and generate a second pumping voltage,

wherein the control unit generates the first pumping enable signal which is repeatedly enabled and disabled at times when the active signal is enabled, and generates the second pumping enable signal which has a phase opposite to the first pumping enable signal.

2. The semiconductor apparatus according to claim 1 , wherein the first pumping voltage has a voltage level higher than a level of an external voltage, and the second pumping voltage has a voltage level lower than a level of a ground voltage.

3. The semiconductor apparatus according to claim 1 , wherein the control unit generates the first pumping enable signal by dividing the active signal, and generates the second pumping enable signal by inverting the first pumping enable signal.

4. The semiconductor apparatus according to claim 1 , further comprising:

a word line driver configured to be applied with the first pumping voltage and the second pumping voltage as driving voltages.

5. A semiconductor apparatus comprising:

a first sensing section configured to sense a level of a first pumping voltage and generate a first oscillator enable signal;

a first oscillator configured to generate a first oscillator signal in response to the first oscillator enable signal;

a first standby pumping section configured to perform a pumping operation in response to the first oscillator signal and generate the first pumping voltage;

a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal;

a first pumping control section configured to output the first oscillator signal as a first active oscillator signal during an enable period of the first pumping enable signal;

a first active pumping section configured to perform a pumping operation in response to the first active oscillator signal and generate the first pumping voltage;

a second sensing section configured to sense a level of a second pumping voltage and generate a second oscillator enable signal;

a second oscillator configured to generate a second oscillator signal in response to the second oscillator enable signal;

a second standby pumping section configured to perform a pumping operation in response to the second oscillator signal and generate the second pumping voltage;

a second pumping control section configured to output the second oscillator signal as a second active oscillator signal during an enable period of the second pumping enable signal; and

a second active pumping section configured to perform a pumping operation in response to the second active oscillator signal and generate the second pumping voltage.

6. The semiconductor apparatus according to claim 5 , wherein the first pumping voltage has a voltage level higher than a level of an external voltage, and the second pumping voltage has a voltage level lower than a level of a ground voltage.

7. The semiconductor apparatus according to claim 5 , wherein the control unit generates the first pumping enable signal which is repeatedly enabled and disabled at times when the active signal is enabled, and generates the second pumping enable signal which has a phase opposite to the first pumping enable signal.

8. A semiconductor apparatus comprising:

a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal in a refresh operation;

a first pumping voltage generation unit configured to perform a pumping operation in response to the active signal and the first pumping enable signal and generate a first pumping voltage; and

a second pumping voltage generation unit configured to perform a pumping operation in response to the active signal and the second pumping enable signal and generate a second pumping voltage,

wherein the control unit generates the first pumping enable signal by dividing the active signal during an enable period of a refresh signal, and generates the second pumping enable signal by inverting the first pumping enable signal.

9. The semiconductor apparatus according to claim 8 , wherein the first pumping voltage and the second pumping voltage have different levels.

10. The semiconductor apparatus according to claim 9 , wherein the first pumping voltage has a voltage level higher than a level of an external voltage, and the second pumping voltage has a voltage level lower than a level of a ground voltage.

11. The semiconductor apparatus according to claim 8 , wherein the control unit enables both the first and second pumping enable signals when the refresh signal is disabled.

12. The semiconductor apparatus according to claim 11 , wherein the first pumping voltage generation unit performs the pumping operation when both the active signal and the first pumping enable signal are enabled.

13. The semiconductor apparatus according to claim 11 , wherein the second pumping voltage generation unit performs the pumping operation when both the active signal and the second pumping enable signal are enabled.

14. A semiconductor apparatus comprising:

a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal in a refresh operation;

a first pumping voltage generation unit configured to perform a pumping operation in response to the active signal and the first pumping enable signal and generate a first pumping voltage; and

a second pumping voltage generation unit configured to perform a pumping operation in response to the active signal and the second pumping enable signal and generate a second pumping voltage,

wherein, in the refresh operation, the first pumping voltage generation unit and the second pumping voltage generation unit alternately perform the pumping operations, and

wherein, in a non-refresh operation, the first pumping voltage generation unit and the second pumping voltage generation unit simultaneously perform the pumping operations.

15. The semiconductor apparatus according to claim 14 ,

wherein, when the refresh signal is enabled, the control unit alternately enables the first and second pumping enable signals at times when the active signal is enabled, and

wherein, when the refresh signal is disabled, the control unit enables both the first and second pumping enable signals.

16. The semiconductor apparatus according to claim 15 , wherein the first pumping voltage generation unit performs the pumping operation when both the active signal and the first pumping enable signal are enabled, and generates the first pumping voltage.

17. The semiconductor apparatus according to claim 15 , wherein the second pumping voltage generation unit performs the pumping operation when both the active signal and the second pumping enable signal are enabled, and generates the second pumping voltage.

18. A semiconductor apparatus comprising:

a first sensing section configured to sense a level of a first pumping voltage and generate a first oscillator enable signal;

a first oscillator configured to generate a first oscillator signal in response to the first oscillator enable signal;

a first standby pumping section configured to perform a pumping operation in response to the first oscillator signal and generate the first pumping voltage;

a control unit configured to generate a first pumping enable signal and a second pumping enable signal which are alternately enabled, in response to an active signal in a refresh operation;

a first pumping control section configured to output the first oscillator signal as a first active oscillator signal when both the first pumping enable signal and the active signal are enabled;

a first active pumping section configured to perform a pumping operation in response to the first active oscillator signal and generate the first pumping voltage;

a second sensing section configured to sense a level of a second pumping voltage and generate a second oscillator enable signal;

a second oscillator configured to generate a second oscillator signal in response to the second oscillator enable signal;

a second standby pumping section configured to perform a pumping operation in response to the second oscillator signal and generate the second pumping voltage;

a second pumping control section configured to output the second oscillator signal as a second active oscillator signal when both the second pumping enable signal and the active signal are enabled; and

a second active pumping section configured to perform a pumping operation in response to the second active oscillator signal and generate the second pumping voltage.

19. The semiconductor apparatus according to claim 18 ,

wherein, when the refresh signal is enabled, the control unit alternately enables the first and second pumping enable signals at times when the active signal is enabled, and

wherein, when the refresh signal is disabled, the control unit enables both the first and second pumping enable signals.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2012
From: KIM, JONG HWAN
To: SK HYNIX INC.
Reel/Frame 029312/0565 →