Method and device for acquiring a code phase shift between an input sequence and a reference sequence

1. A method for acquiring a code phase shift between an input sequence and a reference sequence, said method to be implemented using an acquisition device that includes a mapping unit, a comparison unit and a calculating unit, and comprising the following steps of:

(A) configuring the mapping unit to transform the input sequence into an input signal with a complex phase, and to transform the reference sequence into a reference signal with a complex phase;

(B) configuring the comparison unit to compute a phase coherent indicator according to a phase relationship between the input signal and the reference signal; and

(C) configuring the calculating unit to obtain the code phase shift between the input sequence and the reference sequence based on a phase of the phase coherent indicator and a number of bits of the input sequence; wherein:

in step (B), the comparison unit is further configured to obtain the phase coherent indicator based on the bits of the input sequence; and

in step (C), when the phase of the phase coherent indicator is between

(

2

⁢

π

N

·

q

-

π

N

)

⁢

⁢

and

⁢

⁢

(

2

⁢

π

N

·

q

+

π

N

)

,

the calculating unit is further configured to compute the code phase shift between the input sequence and the reference sequence as q, where N is the number of the bits of the input sequence, and 0≦q<N.

2. The method as claimed in claim 1 , the input signal including the number N of bits {x 0 , x 1 , x 2 . . . , x N−1 }, the reference signal including the number N of bits {y 0 , y 1 , y 2 . . . , y N−1 } wherein:

in step (A), the input sequence is partitioned and transformed into a number K 1 of first input signal groups with complex phases, each including a number M 1 of bits (x n 1 K 1 +i ) after the mapping unit, and the reference sequence is partitioned and transformed into the number K 1 of first reference signal groups with complex phases, each having the number M 1 of bits (y n 1 K 1 +1 ) after the mapping unit, where n 1 is a variable with values iterating from 0 to (M 1 −1), N=K 1 ×M 1 and i is a variable with values iterating from 0 to (K 1 −1);

in step (B), the comparison unit is further configured to obtain a plurality of first indicators, each of which is computed based on a respective permutation of the first input signal groups with a particular order and a corresponding permutation of the first reference signal groups with an offset of a specified number of bits from the first input signal groups; and

in step (C), the calculating unit is further configured to identify one of the first indicators with a largest magnitude serving as the first phase coherent indicator used in step (C), and is configured to obtain, when said first phase coherent indicator with the largest magnitude has a phase between

(

2

⁢

π

M

1

·

c

1

-

π

M

1

)

⁢

⁢

and

⁢

⁢

(

2

⁢

π

M

1

·

c

1

+

π

M

1

)

and is based on the respective permutation of the first input signal groups and the corresponding permutation of the first reference signal groups with an offset of a number of d 1 bits, the code phase shift based on the numbers d 1 and c 1 , where 0≦d 1 <(K 1 −1), and c 1 is a first shift number ranging from 0 to M 1 , said first input signal groups conforming with said first reference signal groups as being offset by the first shift number c 1 of bits.

3. The method as claimed in claim 2 , wherein, in step (C), the calculating unit is further configured to compute the code phase shift based upon q=(c 1 K 1 +d 1 ).

4. The method as claimed in claim 2 , further comprising the following steps of:

configuring the mapping unit to obtain a number K 2 of second input signal groups with complex phases from a first input sequence, each of which is partitioned and transformed from respective M 2 bits of the input sequence X(n 2 K 1 K 2 +jK 1 +(z 1 +d 1 )) mod N, and to obtain the number K 2 of second reference signal groups with complex phases from a first reference sequence, each of which is partitioned and transformed from the respective M 2 bits of the reference sequence y n 2 K 1 K 2 +jK 1 +z 1 , where n 2 is a variable with values iterating from 0 to (M 2 −1), M 1 =K 2 ×M 2 , 0≦j≦(K 2 −1), and z 1 indicates a part of the first input signal groups associated with said one of the first indicators with the largest magnitude;

configuring the comparison unit to obtain a plurality of second indicators, each of which is computed based on respective permutation of the second input signal groups with a particular order and a corresponding permutation of the second reference signal groups with an offset of a specified number of bits from the second input signal groups; and

configuring the calculating unit to identify one of the second indicators with a largest magnitude, and to compute, when said second phase coherent indicator with the largest magnitude has a phase between

(

2

⁢

π

M

2

·

c

2

-

π

M

2

)

⁢

⁢

and

⁢

⁢

(

2

⁢

π

M

2

·

c

2

+

π

M

2

)

and is associated with the second input signal groups and the second reference signal groups with an offset of a number d 2 of bits therebetween, the code phase shift based upon (c 2 K 2 +d 2 ) K 1 +d 1 , where mod represents modulus arithmetic, 0≦d 2 <K 2 , and c 2 is a second shift number ranging from 0 to M 2 , said second input signal groups conforming with said second reference signal groups as being offset a by second shift number c 2 of bits.

5. A method for acquiring a code phase shift between an input sequence and a reference sequence, said method to be implemented using an acquisition device that includes a first mapping unit, a first comparison unit and a first calculating unit, and comprising the following steps of:

(a) configuring the first mapping unit to partition the input sequence including a number N of bits {x 0 , x 1 , x 2 . . . , x N−1 } into a number K 1 of first input sequence groups each including a number M 1 of bits (x n 1 K 1 +i ), where n 1 is a variable with values iterating from 0 to (M 1 −1), N=K 1 ×M i , and i is a variable with values iterating from 0 to (K 1 −1), and to transform the first input sequence groups into first input signal groups with complex phases, and to partition the reference sequence including the number N of bits {y 0 , y 1 , y 2 . . . , y N−1 } into the number K 1 of first reference sequence groups each including the number M 1 of bits (y n 1 K 1 +i ) and to transform the first reference sequence groups into first reference signal groups with complex phases;

(b) configuring the first comparison unit to obtain a plurality of first indicators, each of which is computed based on a respective permutation of the first input signal groups with a particular order and a corresponding permutation of the first reference signal groups with an offset of a number of m 1 bits from the first input signal groups, where m 1 ranges from 0 to (K 1 −1); and

(c) configuring the first calculating unit to obtain the code phase shift based on one of the numbers m 1 that is associated with one of the first indicators with a largest magnitude.

6. The method as claimed in claim 5 , wherein, in step (c), the first calculating unit is further configured to obtain the code phase shift further based on a first shift number c 1 , where said first input signal groups conforms with the first reference signal groups as being offset by the first shift number c 1 of bits.

7. The method as claimed in claim 6 , wherein, in step (c), the first calculating unit is further configured to compute the first shift number c 1 based upon

c

1

=

Ω

1

2

⁢

π

·

M

1

,

where Ω 1 is a phase of said first phase coherent indicator with the largest magnitude, and is configured to transfer the first shift number c 1 to an integer using one of a floor function, a ceiling function and a round half up function.

8. The method as claimed in claim 5 , the acquisition device further including a second mapping unit, a second comparison unit and a second calculating unit, the method further comprising the following steps of:

(d) for each of the first input sequence groups, configuring the second mapping unit to partition a (i+d 1 )th one of the first input sequence groups into a number K 2 of second input sequence groups each including a number M 2 of bits x (n 2 K 1 K 2 +jK 1 +(i+d 1 ))mod N and to transform the second input sequence groups into second input signal groups with complex phases, and to partition the first reference sequence groups into a number K 2 of second reference sequence groups each including a number M 2 of bits y n 2 K 1 K 2 +jK 1 +i and to transform the second reference sequence groups into second reference signal groups with complex phases, where M 1 =K 2 ×M 2 , n 2 is a variable with values iterating from 0 to (M 2 −1), j is a variable with values iterating from 0 to k 2 , mod represents modulus arithmetic, and d 1 is one of the numbers m 1 that results in the first phase coherent indicator with a largest magnitude;

(e) configuring the second comparison unit to obtain a plurality of second indicators, each of which is computed based on a respective permutation of the second input signal groups with a particular order and a corresponding permutation of the second reference signal groups with an offset of a number m 2 of bits from the second input signal groups, and for each of the numbers m 2 , to obtain a characteristic signal based on a part of said second indicators that are associated with a particular one of the numbers m 2 , where m 2 ranges from 0 to (K 2 −1); and

(f) configuring the second calculating unit to identify one of the characteristic signals with a largest magnitude, and to compute the code phase shift based on one of the numbers m 2 that is associated with said one of the characteristic signals with the largest magnitude.

9. The method as claimed in claim 8 , further comprising a step of:

configuring the second calculating unit to obtain the code phase shift based on said one of the numbers m 1 that is associated with said one of the first indicators with the largest magnitude, one of the numbers m 2 that is associated with said one of the second indicators with a largest magnitude, and a second shift number c 2 , where said second input signal groups conforming with said second reference signal groups as being offset by a second shift number c 2 of bits.

10. The method as claimed in claim 8 , the acquisition device further including a coherence correction unit, said method further comprising, before step (f), the following steps of:

(g) when the magnitude of said one of the characteristic signals with the largest magnitude is not larger than a threshold value, configuring the coherence correction unit to obtain another one of the numbers m 1 that is associated with one of the first indicators having a second largest magnitude; and

(h) configuring the acquisition device to repeat steps (d), (e) and (g) until said characteristic signal that is associated with said another one of first indicators with the numbers m 1 is larger than the threshold value; and

(i) configuring the second calculating unit to execute step (f).

11. A device for acquiring a code phase shift between an input sequence and a reference sequence, said device comprising:

a first mapping unit configured to partition the input sequence including a number N of bits {x 0 , x 1 , x 2 . . . , x N−1 } into a number K 1 of first input sequence groups each including a number M 1 of bits (x n 1 K 1 +i ) and to transform the first input sequence groups into first input signal groups with complex phases, and to partition the reference sequence including the number N of bits {y 0 , y 1 , y 2 . . . , y N−1 } into the number K 1 of first reference sequence groups each including the number M 1 of bits (y n 1 K 1 +i ) and to transform the first reference sequence groups into the number K 1 of first reference signal groups with complex phases, where n 1 is a variable with values iterating from 0 to (M 1 −1), N=K 1 ×M 1 , and i is a variable with values iterating from 0 to (K 1 −1);

a first comparison unit configured to obtain a plurality of first indicators, each of which is computed based on a respective permutation of the first input signal groups with a particular order and a corresponding permutation of the first reference signal groups with an offset of a number of m 1 bits from the first input signal groups, where m 1 ranges from 0 to (K 1 −1); and

a first calculating unit configured to obtain the code phase shift based on one of the numbers m 1 that is associated with one of the first indicators with a largest magnitude.

12. The device as claimed in claim 11 , wherein said first calculating unit is further configured to obtain the code phase shift further based on a first shift number c 1 , said first input signal groups conforming with said first reference signal groups as being offset by the first shift number c 1 of bits.

13. The device as claimed in claim 11 , further comprising:

a second mapping unit configured, for each of the first input sequence groups, to partition a (i+d 1 )th one of the first input sequence groups into a number K 2 of second input sequence groups each including a number M 2 of bits x (n 2 K 1 K 2 +jK 1 +(i+d 1 )) modN and to transform the second input sequence groups into the number K 2 of second input signal groups with complex phases, and to partition an ith one of the first reference sequence groups into the number K 2 of second reference signal groups each including the number M 2 of bits y n 2 K 1 K 2 +jK 1 +i and to transform the second reference sequence groups into the number K 2 of second reference signal groups with complex phases, where M 1 =K 2 ×M 2 , n 2 is a variable with values iterating from 0 to (M 2 −1), j is a variable with values iterating from 0 to k 2 , mod represents modulus arithmetic, and d 1 is one of the numbers m 1 that results in one of the first indicators with a largest magnitude;

a second comparison unit configured to obtain a plurality of second indicators, each of which is computed based on a respective permutation of the second input signal groups with a particular order and a corresponding permutation of the second reference signal groups with an offset of a number m 2 of bits from the second input signal groups, and for each of the numbers m 2 , to obtain a characteristic signal based on a part of said second indicators that are associated with a particular one of the numbers m 2 , where m 2 ranges from 0 to (K 2 −1); and

a second calculating unit configured to identify one of the second indicators with a largest magnitude, and to compute the code phase shift based on one of the numbers m 2 that is associated with said one of the characteristic signals with the largest magnitude.

14. The device as claimed in claim 13 , further comprising a coherence correction unit configured, when the magnitude of said characteristic signal with the largest magnitude is not larger than a threshold value, to obtain another one of the numbers m 1 that is associated with one characteristic signal having a second largest magnitude, wherein:

said second mapping unit is further configured to obtain another set of second input and reference signal groups based on said another one of the numbers m 1 , and said second comparison unit is further configured to obtain another set of characteristic signals accordingly; and

when said coherence correction unit determines that one of said another set of the characteristic signals with a largest magnitude, as being larger than the threshold value, said second calculating unit is further configured to compute the code phase shift based on one of the numbers m 2 that is associated with said one of the characteristic signals with the largest magnitude.