Switch for clock synchronization over a switched fabric

1. A switch, comprising:

at least one I/O port, configured to couple to a memory-mapped fabric;

a processing element, coupled to the at least one I/O port; and

a counter;

wherein the switch is configured to:

receive a request packet via the at least one I/O port from a device over the memory-mapped fabric; and

transmit a completion packet via the at least one I/O port to the device over the memory-mapped fabric, wherein the completion packet comprises a counter value from the counter; and

wherein the processing element is configured to:

determine an in-switch delay related to the receiving of the request packet and transmitting of the completion packet; and

store the in-switch delay.

2. The switch of claim 1 , wherein, to determine the in-switch delay, the switch is configured to:

determine a receiving time corresponding to receiving the request packet; and

determine a difference between the receiving time and a transmitting time corresponding to transmitting of the completion packet.

3. The switch of claim 1 ,

wherein the completion packet comprises a request delay field; and

wherein, to store the in-switch delay, the switch is configured to store the in-switch delay in the request delay field by adding the in-switch delay to a value in the request delay field before transmitting of the packet.

4. The switch of claim 1 ,

wherein the completion packet comprises a request delay field and a completion delay field; and

wherein, to store the in-switch delay, the switch is configured to:

add a first portion of the in-switch delay to a value in the request delay field; and

add a second portion of the in-switch delay to a value in the completion delay field.

5. The switch of claim 1 , further comprising:

a storage element, coupled to the processing element;

wherein the switch is further configured to:

store the in-switch delay in the storage element; and

retrieve the in-switch delay and transmit an information packet with the in-switch delay to a first device in response to receiving a read packet from the first device.

6. The switch of claim 1 , further comprising:

one or more non-transparent bridges configured to transfer packets between a plurality of clock domains; and

one or more additional counters, wherein the switch comprises at least one counter corresponding to each of the plurality of clock domains;

wherein the device resides in a different clock domain than the clock domain corresponding to the counter.

7. A method, comprising:

a switch performing:

receiving a request packet from a device over a memory-mapped fabric;

transmitting a completion packet to the device over the memory-mapped fabric, wherein the completion packet comprises a counter value from a counter of the switch;

determining an in-switch delay related to the receiving and the transmitting; and

storing the in-switch delay.

8. The method of claim 7 , where said determining comprises:

storing a first counter value corresponding to reception of the request packet; and

determining a difference between the first counter value and a second counter value corresponding to transmitting of the completion packet.

9. The method of claim 7 ,

wherein the completion packet comprises a request delay field; and

wherein the storing comprises adding the in-switch delay to a value in the request delay field.

10. The method of claim 7 ,

wherein the completion packet comprises a request delay field and a completion delay field; and

wherein, the storing comprises:

adding a first portion of the in-switch delay to a value in the request delay field; and

adding a second portion of the in-switch delay to a value in the completion delay field.

11. A switch, comprising:

at least one I/O port, configured to couple to a memory-mapped fabric; and

a processing element, coupled to the at least one I/O port;

wherein the switch is configured to:

receive a packet via the at least one I/O port from a first device over the memory-mapped fabric; and

forward the packet via the at least one I/O port to a second device over the memory-mapped fabric; and

wherein the processing element is configured to:

determine an in-switch delay of the packet related to the receiving and forwarding of the packet; and

store the in-switch delay.

12. The switch of claim 11 , wherein, to determine the in-switch delay, the switch is configured to:

determine a receiving time corresponding to reception of the packet; and

determine a difference between the receiving time and a sending time corresponding to forwarding of the packet.

13. The switch of claim 11 ,

wherein the packet comprises a transaction delay field; and

wherein, to store the in-switch delay, the switch is configured to store in the in-switch delay in the transaction delay field by adding the in-switch delay to a value in the transaction delay field before forwarding of the packet.

14. The switch of claim 11 , further comprising:

a storage element, coupled to the processing element;

wherein the switch is further configured to:

store the in-switch delay in the storage element; and

retrieve the in-switch delay and transmit an information packet with the in-switch delay to the first device in response to receiving a read packet from the first device.

15. The switch of claim 11 ,

wherein the packet is a request packet;

wherein the switch is configured to:

receive a completion packet associated with the request packet via the at least one I/O port from the second device over the memory-mapped fabric; and

forward the completion packet via the at least one I/O port to the first device over the memory-mapped fabric; and

wherein the processing element is configured to:

determine an in-switch delay of the completion packet related to the receiving and forwarding of the packet; and

store the in-switch delay of the completion packet.

16. The switch of claim 11 ,

wherein the switch is associated with a bridge between the memory-mapped fabric and a host controller, wherein the in-switch delay includes a delay of the packet in the bridge.

17. A method, comprising:

a switch performing:

receiving a packet from a first device over a memory-mapped fabric;

forwarding the packet to a second device over the memory-mapped fabric;

determining an in-switch delay of the packet; and

storing the in-switch delay.

18. The method of claim 17 , wherein said determining comprises:

storing a first counter value corresponding to the receiving; and

determining a difference between the first counter value and a second counter value corresponding to the forwarding.

19. The method of claim 17 ,

wherein the packet comprises a transaction delay field; and

wherein the storing comprises adding the in-switch delay of the packet to a value in the transaction delay field of the packet.

20. The method of claim 17 , wherein said storing comprises:

storing the in-switch delay in a storage element of the switch;

wherein the method further comprises:

retrieving the in-switch delay and transmitting an information packet with the in-switch delay to the first or the second device in response to receiving a read packet from the first device or the second device.

21. The method of claim 17 , wherein the packet is a request packet, the method further comprising:

receiving a completion packet associated with to the request packet via the at least one I/O port from the second device over the memory-mapped fabric;

forwarding the completion packet via the at least one I/O port to the first device over the memory-mapped fabric;

determining an in-switch delay of the completion packet related to the receiving and forwarding of the packet; and

storing the in-switch delay of the completion packet.