Decoding low-density parity check (LDPC) codewords
View Patent ↗A low-density parity-check (LDPC) codeword is decoded by performing a partial parity check, and based on the partial parity check, determining whether an iteration condition is met. Determining whether the iteration condition is met includes determining whether a time to decode a last codeword is approaching. Determining whether the iteration condition is met can additionally include determining whether a number of partial iterations reaches a maximum number of iterations and/or determining whether hardware resources are becoming limited. If the iteration condition is met, a decoding result is reported. If the iteration condition is not met, then a plurality of check nodes are updated and a parity check is performed.
1. A method of decoding a low-density parity-check (LDPC) codeword, the method comprising:
performing a partial parity check;
based on the partial parity check, determining whether an iteration condition is met, wherein determining whether the iteration condition is met includes determining whether a time to decode a last codeword is approaching;
when the iteration condition is met, reporting a decoding result; and
when the iteration condition is not met, updating a plurality of check nodes and performing a parity check.
2. The method of claim 1 , wherein determining whether the iteration condition is met includes determining whether a number of partial iterations is equal to a maximum number of iterations.
3. The method of claim 2 , further including storing the maximum number of iterations as a dynamic value.
4. The method of claim 2 , further including performing a simulation, and storing a result of the simulation as the maximum number of iterations.
5. The method of claim 1 , wherein determining whether the iteration condition is met includes determining whether hardware resources are limited.
6. The method of claim 5 , wherein determining whether hardware resources are limited includes monitoring a buffer level and indicating the hardware resources are limited when the buffer level is approaching full.
7. The method of claim 1 , wherein determining whether the time to decode the last codeword is approaching is based on a short interframe space (SIFS).
8. The method of claim 1 , wherein determining whether the time to decode the last codeword is approaching is based on a power amplifier activation time.
9. The method of claim 1 , wherein reporting the decoding result includes decoding of an OFDM transmission.
10. A system for decoding a low-density parity-check (LDPC) codeword, the system comprising:
a partial parity check module configured to perform a partial parity check based on updates to a portion of variable nodes;
an iteration condition checker coupled to the partial parity check module and configured to determine whether an iteration condition of a plurality of iteration conditions has been met, wherein the iteration condition checker is configured based on a latency to decode a last codeword; and
an iteration condition storage module configured to store at least one iteration condition.
11. The system of claim 10 , further comprising:
a last code word checker configured to determine whether a codeword being received is a last codeword of a transmission, the last code word checker coupled to the iteration condition checker.
12. The system of claim 10 , wherein the iteration condition checker is configured to monitor a buffer usage level.
13. The system of claim 10 , wherein the iteration condition checker is configured to check results of the partial parity check module.
14. The system of claim 10 , wherein the iteration condition checker is configured to report a decoding result based on a maximum number of partial iterations being performed, the maximum number of partial iterations being stored as the at least one iteration condition.
15. A system for decoding a low-density parity-check (LDPC) codeword, the system comprising:
a partial parity check module configured to perform a partial parity check based on updates to a portion of variable nodes;
an iteration condition checker coupled to the partial parity check module, wherein the iteration condition checker is configured to determine whether an iteration condition of a plurality of iteration conditions has been met, and to report a decoding result based on a maximum number of partial iterations being performed, the maximum number of partial iterations being based on a latency to decode a last codeword; and
an iteration condition storage module configured to store at least one iteration condition.
16. A computer-readable, non-transitory media comprising instructions therein that, when executed by a processor, implement a method of decoding a low-density parity check (LDPC) codeword, the method comprising:
performing a partial parity check;
based on the partial parity check, determining whether an iteration condition is met, wherein determining whether the iteration condition is met includes determining whether a time to decode a last codeword is approaching;
when the iteration condition is met, reporting a decoding result; and
when the iteration condition is not met, updating a plurality of check nodes and performing a parity check.
17. The computer-readable media of claim 16 , wherein the computer-readable media comprises a firmware update.
18. A computer-readable media of claim 16 , wherein the decoding result is a decoding of an 802.11n transmission.