IP Library Granted Patent US 9,158,572
Granted Patent B1
US 9,158,572 · App. 13/612,187 · Granted Oct 13, 2015

Method to automatically redirect SRB routines to a zIIP eligible enclave

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Quick Facts
Patent No.
US 9,158,572
App. No.
13/612,187
Granted
Oct 13, 2015
Kind
B1
Abstract

A method to redirect SRB routines from otherwise non-zIIP eligible processes on an IBM z/OS series mainframe to a zIIP eligible enclave is disclosed. This redirection is achieved by intercepting otherwise blocked operations and allowing them to complete processing without errors imposed by the zIIP processor configuration. After appropriately intercepting and redirecting these blocked operations more processing may be performed on the more financially cost effective zIIP processor by users of mainframe computing environments.

Claims (45)

1. A method of patching a mainframe operating system controlling a mainframe computer, the method comprising:

obtaining an address range in memory for a nucleus-resident routine;

unlocking one or more pages of memory in the obtained address range;

searching the obtained address range for pointers to SCHEDULE service code that creates service request blocks (SRBs);

updating the pointers to the SCHEDULE service code in the nucleus-resident routine to point to an intercept routine, wherein the intercept routine includes an interface to an IEAMSCHD service and includes code that directs invocations of the SCHEDULE service to the IEAMSCHD service; and

updating a supervisor vector table (SVT) with pointers to the intercept routine,

wherein the intercept routine enables an application program calling the SCHEDULE service to execute on one or more otherwise prohibited financially cost effective processors.

2. The method of claim 1 , wherein unlocking one or more pages of memory includes turning off a page protect bit corresponding to the one or more pages of memory.

3. The method of claim 2 further comprising locking the one or more pages of unlocked memory by turning on a page protect bit corresponding to the one or more pages of memory after updating the pointers.

4. The method of claim 1 wherein the nucleus resident routine comprises IEAVELCR.

5. The method of claim 1 further comprising making Service Request Block (SRB) code eligible to run on a more cost effective hardware processor of the mainframe computer.

6. The method of claim 1 wherein the one or more cost effective processors include a zIIP.

7. The method of claim 1 wherein the interface to the IEAMSCHD service includes a link to an enclave using an 8-byte token.

8. The method of claim 1 , wherein the code further directs invocations of the SCHEDULE service to the SCHEDULE service when the application program fails to pass a validation test.

9. The method of claim 1 wherein the intercept routine accounts for a scope of the SCHEDULE service.

10. A non-transitory computer-readable medium with instructions embodied thereon to cause a programmable control device to perform the method of claim 1 .

11. A mainframe computer comprising:

an operating system;

one or more intercepting routines; and

a plurality of processors, at least some of the processors being more cost effective than other processors,

wherein mainframe computer is configured to:

obtain an address range in memory for a nucleus-resident routine,

unlock one or more pages of memory in the obtained address range,

search the obtained address range for pointers to SCHEDULE service code that creates service request blocks (SRBs),

update the pointers to the SCHEDULE service code in the nucleus-resident routine to point to an intercept routine, wherein the intercept routine includes an interface to an IEAMSCHD service and includes code that directs invocations of the SCHEDULE service to the IEAMSCHD service, and

update a supervisor vector table (SVT) with pointers to the intercept routine,

wherein the intercept routine enables an application program calling the SCHEDULE service to execute on one or more of the otherwise prohibited more cost effective processors.

12. The mainframe computer of claim 11 , wherein unlocking one or more pages of memory includes turning off a page protect bit corresponding to the one or more pages of memory.

13. The mainframe computer of claim 12 further configured to lock the one or more pages of unlocked memory by turning on a page protect bit corresponding to the one or more pages of memory after updating the pointers.

14. The mainframe computer of claim 11 wherein the nucleus resident routine comprises IEAVELCR.

15. The mainframe computer of claim 11 further comprising making Service Request Block (SRB) code eligible to run on the more cost effective processors of the mainframe computer.

16. The mainframe computer of claim 11 wherein the more cost effective processors include a zIIP.

17. The mainframe computer of claim 11 wherein the interface to the IEAMSCHD service includes a link to an enclave using an 8-byte token.

18. The mainframe computer of claim 17 , wherein the code further directs invocations of the SCHEDULE service to either the SCHEDULE service when the application program fails to pass a validation test.

19. The mainframe computer of claim 11 wherein each of the one or more intercept routines corresponds to a scope of a SCHEDULE service.

20. A computer-implemented method comprising:

creating a zIIP eligible enclave;

replacing references to SCHEDULE service code in a nucleus-resident routine with references to intercept routines, wherein the SCHEDULE service code creates service request blocks (SRBs) and the intercept routine includes an interface to an IEAMSCHD service and includes code that directs invocations of the SCHEDULE service to the IEAMSCHD service; and

replacing original references to the SCHEDULE service code in a supervisor vector table (SVT) with the references to the intercept routines,

wherein a call, by an originating application program, to the SCHEDULE service is intercepted with a call to a service that creates a service request block linked to the zIIP eligible enclave.

21. The method of claim 20 further comprising:

storing the original references to the SCHEDULE service in a memory;

determining whether the originating application program is authorized for redirection; and

directing a call to the SCHEDULE service to the original references when it is determined the originating application program is not authorized.

22. A non-transitory computer-readable medium with instructions embodied thereon to cause a programmable control device to perform the method of claim 20 .

Assignments (14)
GRANT OF FIRST LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 13, 2024
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 069352/0628 →
GRANT OF SECOND LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Nov 13, 2024
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 069352/0568 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052844/0646) Recorded Aug 6, 2024
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 068339/0408 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (052854/0139) Recorded Aug 6, 2024
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 068339/0617 →
OMNIBUS ASSIGNMENT OF SECURITY INTERESTS IN PATENT COLLATERAL Recorded Mar 4, 2024
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS RESIGNING COLLATERAL AGENT
To: GOLDMAN SACHS BANK USA, AS SUCCESSOR COLLATERAL AGENT
Reel/Frame 066729/0889 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 1, 2024
From: ALTER DOMUS (US) LLC
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.
Reel/Frame 066567/0283 →
GRANT OF SECOND LIEN SECURITY INTEREST IN PATENT RIGHTS Recorded Sep 30, 2021
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: ALTER DOMUS (US) LLC
Reel/Frame 057683/0582 →
SECURITY INTEREST Recorded Jun 4, 2020
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052844/0646 →
SECURITY INTEREST Recorded Jun 4, 2020
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS COLLATERAL AGENT
Reel/Frame 052854/0139 →
RELEASE OF PATENTS Recorded Oct 5, 2018
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: BMC SOFTWARE, INC.; BLADELOGIC, INC.; BMC ACQUISITION L.L.C.
Reel/Frame 047198/0468 →
SECURITY INTEREST Recorded Oct 2, 2018
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: CREDIT SUISSE, AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 047185/0744 →
SECURITY INTEREST Recorded Jul 27, 2017
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 043351/0189 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2015
From: LAVIOLETTE, MICHEL
To: BMC SOFTWARE, INC.
Reel/Frame 036518/0476 →
SECURITY AGREEMENT Recorded Sep 11, 2013
From: BMC SOFTWARE, INC.; BLADELOGIC, INC.
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS COLLATERAL AGENT
Reel/Frame 031204/0225 →