IP Library Granted Patent US 9,233,555
Granted Patent B2
US 9,233,555 · App. 13/616,634 · Granted Jan 12, 2016

System and method for controlling multiple light sources of a laser scanning system in an imaging apparatus

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Quick Facts
Patent No.
US 9,233,555
App. No.
13/616,634
Granted
Jan 12, 2016
Kind
B2
Abstract

A scanning system for use in an imaging apparatus includes a first light source and a second light source for emitting light beams for generating an image. A driver circuitry has first and second outputs connected to the first and second light sources, respectively, for controlling the first and second light sources. A signal transmitter includes a first interface for communicating a clock signal to the driver circuitry and a second interface for communicating an image information signal to the driver circuitry. During a clock cycle of the clock signal, the driver circuitry captures a first bit information from the image information signal at a rising edge of the clock signal and a second bit information from the image information signal at a falling edge of the clock signal. Thereafter, the driver circuitry drives the first and second light sources based on the first and second bit information captured, respectively.

Claims (53)

1. An imaging apparatus for generating an image, comprising:

a first light source and a second light source controllable to emit light beams;

a driver circuit for controlling the first and second light sources;

a first differential signal channel for communicating a clock signal to the driver circuit; and

a second differential signal channel for transmitting a bit stream containing image information to the driver circuit;

wherein the driver circuit is configured to capture a first bit from the bit stream in response to one of a rising edge and a falling edge of the clock signal, capture a second bit from the bit stream in response to the other of the rising edge and the falling edge of the clock signal, and drive the first and second light sources based on the captured first and second bits, respectively; and

wherein the first and second bits of the bit stream are captured in a same clock cycle of the clock signal, and wherein the imaging apparatus further comprises a third light source and a fourth light source controlled by the driver circuit to emit light beams, wherein the driver circuit is further configured to capture a third bit and a fourth bit from the bit stream during the same clock cycle in which the first and second bits are captured but at times other than during an occurrence of an edge of the clock signal, and drive the third and fourth light sources based on the captured third and fourth bits, respectively.

2. The imaging apparatus of claim 1 , wherein the first and second light sources are driven by the driver circuit based on the captured first and second bits, respectively, substantially at the same time at a subsequent edge of the clock signal following the capture of the first and second bits.

3. The imaging apparatus of claim 1 , wherein the driver circuit captures the third and fourth bits during a first half-cycle and a second half-cycle of the same clock cycle of the clock signal, respectively.

4. The imaging apparatus of claim 1 , wherein the third and fourth light sources are driven by the driver circuit based on the captured third and fourth bits, respectively, substantially at the same time at an edge of the clock signal in a subsequent clock cycle from the clock cycle in which the first, second, third and fourth bits are captured.

5. The imaging apparatus of claim 1 , wherein the driver circuit includes delay circuitry for delaying the clock signal communicated over the first differential signal channel to generate a delayed clock signal, edges of the delayed clock signal occur between the rising and falling edges of the clock signal, the edges of the delayed clock signal triggering the capture of the third and fourth bits.

6. The imaging apparatus of claim 1 , wherein each of the first and second differential signal channels comprises a low-voltage differential signaling channel.

7. A scanning system for use in an imaging apparatus, comprising:

a first light source and a second light source controllable to emit light beams for generating an image;

driver circuitry having first and second outputs connected to the first and second light sources, respectively, for controlling the first and second light sources;

a signal transmitter including a first interface for communicating a clock signal to the driver circuitry and a second interface for communicating an image information signal to the driver circuitry;

wherein, during a first clock cycle of the clock signal, the driver circuitry captures first bit information from the image information signal at a rising edge of the clock signal and second bit information from the image information signal at a falling edge of the clock signal, the driver circuitry thereafter configured to drive the first and second light sources based on the first and second bit information captured, respectively; and

a third light source and a fourth light source, wherein the driver circuitry further includes third and fourth outputs connected to the third and fourth light sources over third and fourth signal lines, respectively, the driver circuitry configured to capture third bit information and fourth bit information from the image information signal during the first clock cycle at times other than during an occurrence of an edge of the first clock signal, and drive the third and fourth light sources based on the captured third and fourth bit information, respectively.

8. The scanning system of claim 7 , wherein the driver circuitry drives the first and second light sources based on the first and second bit information, respectively, substantially at the same time at an edge of the clock signal during a second clock cycle following the first clock cycle.

9. The scanning system of claim 7 , wherein the driver circuitry captures the third and fourth bit information during a first half-cycle and a second half-cycle of the first clock cycle, respectively.

10. The scanning system of claim 7 , wherein driver circuitry drives the third and fourth light sources based on the captured third and fourth bit information, respectively, substantially at the same time at an edge of the clock signal during a second clock cycle following the first clock cycle.

11. The scanning system of claim 7 , wherein the driver circuitry includes a delay line for delaying the clock signal to generate a delayed clock signal that is shifted in time relative to the clock signal in such a manner that edges of the delayed clock signal occur between edges of the clock signal, the capture of the third and fourth bits occurring at the edges of the delayed clock signal.

12. The scanning system of claim 7 , wherein the first and second interface of the signal transmitter each comprises a low-voltage differential signaling interface.

13. A method for controlling a scanning system in an imaging apparatus, comprising:

receiving a clock signal and a bit stream containing image information communicated over a first differential signal channel and a second differential signal channel, respectively;

capturing a first bit from the bit stream at a rising edge of a clock signal;

capturing a second bit from the bit stream at a falling edge of the clock signal in a same clock cycle in which the first bit is captured;

driving a first light source and a second light source based on the captured first and second bits, respectively;

capturing a third bit and a fourth bit from the bit stream during the same clock cycle in which the first and second bits are captured at times other than during an occurrence of an edge of the clock signal; and

driving a third light source and a fourth light source based on the third and fourth bits, respectively.

14. The method of claim 13 , wherein the driving of the first and second light sources comprises driving the first and second light sources with the first and second bits, respectively, at substantially the same time in a subsequent clock cycle of the clock signal.

15. The method of claim 13 , wherein the driving of the third and fourth light sources comprises driving the third and fourth light sources with the third and fourth bits, respectively, at substantially the same time in a subsequent clock cycle of the clock signal.

16. The method of claim 13 , wherein the driving of the first, second, third, and fourth light sources comprises driving the first, second, third, and fourth light sources with the first, second, third, and fourth bits, respectively, at substantially the same time in a subsequent clock cycle of the clock signal.

17. The method of claim 13 , further comprising delaying the clock signal communicated over the first differential signal channel by a predetermined time delay to produce a delayed clock signal having edges that occur between edges of the clock signal, wherein the capturing of the third and fourth bits occur at the edges of the delayed clock signal.

18. An imaging apparatus for generating an image, comprising:

a first light source and a second light source controllable to emit light beams;

a driver circuit for controlling the first and second light sources;

a first differential signal channel for communicating a clock signal to the driver circuit; and

a second differential signal channel for transmitting a bit stream containing image information to the driver circuit;

wherein the driver circuit is configured to capture a first bit from the bit stream in response to one of a rising edge and a falling edge of the clock signal, capture a second bit from the bit stream in response to the other of the rising edge and the falling edge of the clock signal, and drive the first and second light sources based on the captured first and second bits, respectively; and

wherein the first and second light sources are driven by the driver circuit based on the captured first and second bits, respectively, substantially at the same time at a subsequent edge of the clock signal following the capture of the first and second bits.

19. A scanning system for use in an imaging apparatus, comprising:

a first light source and a second light source controllable to emit light beams for generating an image;

driver circuitry having first and second outputs connected to the first and second light sources, respectively, for controlling the first and second light sources;

a signal transmitter including a first interface for communicating a clock signal to the driver circuitry and a second interface for communicating an image information signal to the driver circuitry;

wherein, during a first clock cycle of the clock signal, the driver circuitry captures first bit information from the image information signal at a rising edge of the clock signal and second bit information from the image information signal at a falling edge of the clock signal, the driver circuitry thereafter configured to drive the first and second light sources based on the first and second bit information captured, respectively; and

wherein the driver circuitry drives the first and second light sources based on the first and second bit information, respectively, substantially at the same time at an edge of the clock signal during a second clock cycle following the first clock cycle.

20. A method for controlling a scanning system in an imaging apparatus, comprising:

receiving a clock signal and a bit stream containing image information communicated over a first differential signal channel and a second differential signal channel, respectively;

capturing a first bit from the bit stream at a rising edge of a clock signal;

capturing a second bit from the bit stream at a falling edge of the clock signal in a same clock cycle in which the first bit is captured; and

driving a first light source and a second light source based on the captured first and second bits, respectively;

wherein the driving of the first and second light sources comprises driving the first and second light sources with the first and second bits, respectively, at substantially the same time in a subsequent clock cycle of the clock signal.

Assignments (7)
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0293 →
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0192 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: CITIBANK, N.A.
Reel/Frame 073007/0118 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 073007/0346 →
RELEASE OF SECURITY INTEREST Recorded Jan 18, 2024
From: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 066345/0026 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT U.S. PATENT NUMBER PREVIOUSLY RECORDED AT REEL: 046989 FRAME: 0396. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT SECURITY AGREEMENT. Recorded Oct 24, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 047760/0795 →
PATENT SECURITY AGREEMENT Recorded Aug 30, 2018
From: LEXMARK INTERNATIONAL, INC.
To: CHINA CITIC BANK CORPORATION LIMITED, GUANGZHOU BRANCH, AS COLLATERAL AGENT
Reel/Frame 046989/0396 →