High signal to noise ratio capacitive sensing analog front-end

1. A capacitance sensing circuit comprising:

a capacitance-to-voltage converter configured to receive a signal from a capacitance to be sensed and to provide an output signal representative of the capacitance;

an output chopper configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance to be sensed;

an analog accumulator configured to accumulate sensed voltages during an accumulation period of a number of sensing cycles and to provide an accumulated analog value;

an amplifier configured to amplify the accumulated analog value; and

an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed.

2. A capacitance sensing circuit as defined in claim 1 , wherein the analog accumulator includes a low pass filter having a frequency response to filter wideband noise.

3. A capacitance sensing circuit as defined in claim 2 , wherein the frequency response of the low pass filter is programmable to provide a selected frequency response.

4. A capacitance sensing circuit as defined in claim 2 , wherein parameters of the low pass filter are varied during the accumulation period.

5. A capacitance sensing circuit as defined in claim 1 , wherein the analog accumulator includes a triangular analog FIR filter having a frequency response to filter wideband noise.

6. A capacitance sensing circuit as defined in claim 1 , wherein the amplifier is configured to adjust a range of the accumulated analog value to a range compatible with an input to the analog-to-digital converter.

7. A capacitance sensing circuit as defined in claim 6 , wherein the amplifier is configured to hold the accumulated analog value during a subsequent accumulation period.

8. A capacitance sensing circuit as defined in claim 7 , wherein the number of sensing cycles in the accumulation period is selectable.

9. A capacitance sensing circuit as defined in claim 8 , wherein the amplifier is adjusted to provide a constant overall gain for different accumulation periods.

10. A capacitance sensing circuit as defined in claim 1 , further comprising a controller configured to provide timing signals to the capacitance-to-voltage converter, the output chopper, the analog accumulator and the analog-to-digital converter.

11. A capacitance sensing circuit as defined in claim 1 , wherein the capacitance-to-voltage converter, the output chopper, the analog accumulator and the analog-to-digital converter have a single-ended configuration.

12. A capacitance sensing circuit as defined in claim 1 , wherein the capacitance-to-voltage converter, the output chopper, the analog accumulator and the analog-to-digital converter have a differential configuration.

13. A capacitance sensing circuit as defined in claim 1 , wherein an output of the capacitance-to-voltage converter, the output chopper, the analog accumulator and the analog-to-digital converter have a differential configuration, and the input of the capacitance-to-voltage converter has a single-ended configuration.

14. A capacitance sensing circuit as defined in claim 1 , further comprising an input chopper configured to convert a DC voltage to an AC signal applied to the capacitance to be sensed.

15. A capacitance sensing circuit as defined in claim 1 , wherein the capacitance to be sensed is an element of a capacitive touch screen.

16. A method for sensing capacitance, comprising:

generating a signal representative of a capacitance to be sensed;

converting the generated signal to a sensed voltage representative of the capacitance;

repeating the generating and the converting during an accumulation period of a number of sensing cycles and accumulating the sensed voltages to provide an accumulated analog value;

amplifying the accumulated analog value; and

converting the amplified accumulated analog value to a digital value representative of the capacitance to be sensed.

17. A method as defined in claim 16 , wherein accumulating the sensed voltages further comprises low pass filtering of the sensed voltages.

18. A method as defined in claim 17 , wherein low pass filtering comprises programming a low pass filter to provide a selected frequency response.

19. A method as defined in claim 17 , wherein low pass filtering comprises varying parameters of a low pass filter during the accumulation period.

20. A method as defined in claim 16 , wherein amplifying the accumulated analog value is based on an input range of an analog-to-digital converter.

21. A method as defined in claim 20 , wherein amplifying the accumulated analog value comprises holding the accumulated analog value during a subsequent accumulation period.

22. A method as defined in claim 16 , further comprising adjusting the accumulation period to provide a desired speed and noise rejection.

23. A method as defined in claim 20 , wherein amplifying the accumulated analog value comprises adjusting for constant gain with different accumulation periods.

24. A capacitance sensing circuit comprising:

a capacitance-to-voltage converter configured to receive a signal from a capacitance of a touch screen and to provide an output signal representative of the capacitance;

a rectification circuit configured to convert the output signal of the capacitance-to-voltage converter to a sensed voltage representative of the capacitance;

an analog accumulator/filter configured to accumulate sensed voltages during an accumulation period of a number of sensing cycles and to filter the sensed voltages, wherein the analog accumulator/filter provides an accumulated analog value;

an amplifier configured to amplify the accumulated analog value; and

an analog-to-digital converter configured to convert the amplified accumulated analog value to a digital value representative of the capacitance to be sensed.