Digital camera with quad core processor

1. A device with image capture capability, comprising:

an image sensor for sensing image data; and

a central processor integrated into a single chip, the central processor comprising:

a plurality of processing units configured to receive at least a portion of the sensed image data via a connection to the image sensor, and to simultaneously process the portion of the sensed image data, wherein the plurality of processing units are interconnected to each other separately from the connection to the image sensor;

an image sensor interface connecting the image sensor to the plurality of processing units;

an input FIFO (first in, first out) configured to receive data from the image sensor interface and input the data to the plurality of processing units, and an output FIFO configured to receive data processed by the plurality of processing units;

a central processing unit and a data bus connecting the central processing unit to the input FIFO, the central processing unit providing a processing core to operatively control the plurality of processing units;

a data cache connected to the plurality of processing units to store the data processed by the plurality of processing units until required by the central processing unit; and

a plurality of interfaces for transmitting the data processed by the plurality of processing units to functional components within the device, each of the plurality of interfaces being connected to the data cache for reading the data processed by the plurality of processing units,

wherein each processing unit of the plurality of processing units includes at least one address generator for addressing processed data for transmission to the functional components.

2. The device according to claim 1 , wherein the plurality of processing units are interconnected to each other via a crossbar switch.

3. The device according to claim 1 , wherein the sensed image data comprises input image data and the plurality of processing units perform one or more processing tasks selected from:

rotating the input image data;

color converting the input image data; and,

dithering the input image data.

4. The device according to claim 1 , wherein each processing unit of the plurality of processing units includes RAM (random access memory) for microcode written by the central processing unit to operatively control that processing unit.

5. The device according to claim 4 , wherein one of the plurality of interfaces is a keyboard interface for input of instructions to the central processing unit such that the central processor rewrites the microcode in the RAM within each of the processing units.

6. The device according to claim 4 , wherein one of the plurality of interfaces is a scanner interface for receiving scanned image data of an image encoding image processing instructions in a machine readable form, the scanner interface being configured to decode the scanned image data and send the image processing instructions to the input FIFO.

7. The device according to claim 1 , further comprising a print media roll on which a printhead prints, the print media roll being removable and replaceable, and one of the plurality of interfaces is an authentication chip interface for interrogating an authentication chip in the media roll for authentication information.

8. The device according to claim 1 , further comprising an LCD (liquid crystal display) display, wherein one of the plurality of interfaces is an LCD interface such that the data processed by the plurality of processing units addressed to the LCD interface is transmitted from the data cache to the LCD display.

9. The device according to claim 1 , further comprising a memory, wherein one of the plurality of interfaces is a memory interface such that the data processed by the plurality of processing units addressed to the memory interface is transmitted from the data cache to the memory.