Multi-core processor for hand-held, image capture device

1. A multi-core processor for a hand-held device with first and second image sensors, the multi-core processor comprising:

a first sensor interface for receiving data from the first image sensor;

a second sensor interface for receiving data from the second image sensor;

multiple processing units configured to operate in parallel for processing data from the first and second sensor interfaces to generate processed data, wherein the multiple processing units and the first and second sensor interfaces are integrated onto a single chip;

an input FIFO (first in, first out) configured for receiving data from the first and second image sensor interfaces and for inputting the data received from the first and second image sensor interfaces to the multiple processing units;

an output FIFO configured for receiving the processed data; and

an instruction input interface connected to the input FIFO, wherein the multiple processing units operate in accordance with image processing instructions received as encoded data by the instruction input interface.

2. The multi-core processor according to claim 1 , wherein the first image sensor is a CMOS image sensor for capturing images viewed by the hand-held device and the second image sensor is a scanner for scanning encoded data printed on a substrate in a machine readable form, and the first sensor interface is an image sensor interface and the second sensor interface is a scanner interface.

3. The multi-core processor according to claim 2 , wherein the multiple processing units comprise four processing units and the multi-core processor further comprises a crossbar switch for interconnecting each of the four processing units.

4. The multi-core processor according to claim 1 , further comprising a central processing unit and a data bus connecting the central processing unit to the input FIFO and the output FIFO, the central processing unit providing a processing core to operatively control the four processing units.

5. The multi-core processor according to claim 4 further comprising a data cache to store the processed data until required by the central processing unit.

6. The multi-core processor according to claim 1 , wherein the multiple processing units processing data comprises performing one or more processing tasks selected from:

rotating the input image data;

color converting the input image data; and

dithering the input image data.

7. The multi-core processor according to claim 1 , further comprising a display interface for reading the processed data and transmitting the processed data to a color LCD display in the hand-held device.

8. The multi-core processor according to claim 1 , wherein each of the processing units included in the multiple processing units includes at least one address generator.

9. The multi-core processor according to claim 1 , wherein each of the processing units included in the multiple processing units includes RAM (random access memory) for microcode to operatively control the processing unit in which the RAM is included.

10. The multi-core processor according to claim 9 , further comprising a keyboard interface for input of instructions for rewriting the microcode in the RAM included in each of the processing units.

11. The multi-core processor according to claim 1 , further comprising a USB (universal serial bus) interface, wherein the hand-held device has a USB port for communication with an external device.

12. The multi-core processor according to claim 1 , wherein the image processing instructions correspond to a signal that received by the instruction input interface associated with a bit pattern based on pixels.

13. The multi-core processor according to claim 12 , wherein the bit pattern based on pixels is decoded to generate the image processing instructions.

14. The multi-core processor according to claim 1 , further comprising a memory, wherein the image processing instructions are stored in the memory as a script.

15. A hand-held device, comprising:

an image sensor for capturing images viewed by the hand-held device; and

a processor comprising:

a image sensor interface for receiving data from the image sensor;

multiple processing units configured to operate in parallel for processing data from the image sensor interface to generate processed data, wherein the multiple processing units and the image sensor interface are integrated onto a single chip;

an input FIFO (first in, first out) configured for receiving data from the image sensor interface and for inputting the data received from the image sensor interface to the multiple processing units;

an output FIFO configured for receiving the processed data; and

an instruction input interface connected to the input FIFO, wherein the multiple processing units operate in accordance with image processing instructions received as encoded data by the instruction input interface.

16. The hand-held device according to claim 15 , wherein the image processing instructions correspond to a signal that received by the instruction input interface associated with a bit pattern based on pixels.

17. The hand-held device according to claim 16 , wherein the bit pattern based on pixels is decoded to generate the image processing instructions.

18. The hand-held device according to claim 15 , wherein the processor further comprises a memory, wherein the image processing instructions are stored in the memory as a script.