IP Library Granted Patent US 8,766,369
Granted Patent B2
US 8,766,369 · App. 13/625,176 · Granted Jul 1, 2014

Semiconductor device and method of manufacturing semiconductor device

Inventors: Taiji Ema (Yokohama, JP); Kazushi Fujita (Yokohama, JP); Junji Oh (Yokohama, JP)
Assignee: Fujitsu Semiconductor Limited
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Quick Facts
Patent No.
US 8,766,369
App. No.
13/625,176
Granted
Jul 1, 2014
Kind
B2
Abstract

The semiconductor device includes a first transistor including a first impurity layer containing boron or phosphorus, a first epitaxial layer formed above the first impurity layer, a first gate electrode formed above the first epitaxial layer with a first gate insulating film formed therebetween and first source/drain regions, and a second transistor including a second impurity layer containing boron and carbon, or arsenic or antimony, a second epitaxial layer formed above the second impurity layer, a second gate electrode formed above the second epitaxial layer with a second gate insulating film thinner than the first gate insulating film formed therebetween, and second source/drain regions.

Claims (74)

1. A semiconductor device comprising:

a semiconductor substrate which includes a first region and a second region;

a first impurity layer formed in the semiconductor substrate of the first region and containing a first impurity of a first conductivity type;

a second impurity region layer formed in the semiconductor substrate of the second region and containing a second impurity, which has a diffusion constant smaller than a diffusion constant of the first impurity, of the first conductivity type;

a first semiconductor layer formed on the first impurity layer;

a second semiconductor layer formed on the second impurity layer;

a first gate insulating film formed on the first semiconductor layer;

a second gate insulating film thinner than the first gate insulating film formed on the second semiconductor layer;

a first gate electrode formed on the first gate insulating film;

a second gate electrode formed on the second gate insulating film;

a first source/drain region of a second conductivity type which is different from the first conductivity type formed in the first semiconductor layer; and

a second source/drain region of the second conductivity type formed in the second semiconductor layer.

2. The semiconductor device according to claim 1 , further comprising:

a first device isolation insulating film, which surrounds the first region, formed in the semiconductor substrate; and

a second device isolation insulating film formed in the semiconductor substrate.

3. The semiconductor device according to claim 1 , wherein

a concentration of the first impurity in the first semiconductor layer is lower than a concentration of the first impurity in the first impurity layer, and

a concentration of the second impurity in the second semiconductor layer is lower than a concentration of the second impurity in the second impurity layer.

4. The semiconductor device according to claim 1 , wherein

a concentration of the first impurity in the first semiconductor layer is lower than a concentration of the first impurity in the first impurity layer, and

a concentration of the first impurity in the second semiconductor layer is lower than a concentration of the first impurity in the second impurity layer.

5. The semiconductor device according to claim 1 , wherein

the first impurity is boron, and

the third impurity is carbon.

6. The semiconductor device according to claim 1 , wherein

the first impurity is phosphorus, and

the second impurity is arsenic or antimony.

7. The semiconductor device according to claim 1 , wherein

the second impurity layer contains germanium.

8. The semiconductor device according to claim 1 , further comprising:

a first well, which has the first conductivity type, formed in the first region and located under the first impurity layer; and

a second well, which has the first conductivity type, formed in the second region and located under the second impurity layer, wherein

a concentration of the first impurity layer is higher than the first semiconductor layer and the first well; and

a concentration of the second impurity layer is higher than the second semiconductor layer and the second well.

9. The semiconductor device according to claim 1 , wherein

a part of the first semiconductor layer is located under the first gate insulating film and between the first source/drain region, and

a part of the second semiconductor layer is located under the second gate insulating film and between the second source/drain region.

10. A semiconductor device comprising:

a semiconductor substrate which includes a first region and a second region;

a first impurity layer formed in the semiconductor substrate of the first region and containing a first impurity of a first conductivity type;

a second impurity layer formed in the semiconductor substrate of the second region and containing the first impurity and a third impurity which suppresses a diffusion of the first impurity;

a first semiconductor layer formed on the first impurity layer;

a second semiconductor layer formed on the second impurity layer;

a first gate insulating film formed on the first semiconductor layer;

a second gate insulating film thinner than the first gate insulating film formed on the second semiconductor layer;

a first gate electrode formed on the first gate insulating film;

a second gate electrode formed on the second gate insulating film;

a first source/drain region of a second conductivity type which is different from the first conductivity type formed in the first semiconductor layer; and

a second source/drain region of the second conductivity type formed in the second semiconductor layer.

11. The semiconductor device according to claim 10 , further comprising:

a first device isolation insulating film, which surrounds the first region, formed in the semiconductor substrate; and

a second device isolation insulating film, which surrounds the first region, formed in the semiconductor substrate.

12. The semiconductor device according to claim 10 , wherein

a concentration of the first impurity in the first semiconductor layer is lower than a concentration of the first impurity in the first impurity layer, and

a concentration of the second impurity in the second semiconductor layer is lower than a concentration of the second impurity in the second impurity layer.

13. The semiconductor device according to claim 10 , wherein

a concentration of the first impurity in the first semiconductor layer is lower than a concentration of the first impurity in the first impurity layer, and

a concentration of the first impurity in the second semiconductor layer is lower than a concentration of the first impurity in the second impurity layer.

14. The semiconductor device according to claim 10 , wherein

the first impurity is boron, and

the third impurity is carbon.

15. The semiconductor device according to claim 10 , wherein

the first impurity is phosphorus, and

the second impurity is arsenic or antimony.

16. The semiconductor device according to claim 10 , wherein

the second impurity layer contains germanium.

17. The semiconductor device according to claim 10 , further comprising:

a first well, which has the first conductivity type, formed in the first region and located under the first impurity layer; and

a second well, which has the first conductivity type, formed in the second region and located under the second impurity layer,

wherein a concentration of the first impurity layer is higher than the first semiconductor layer and the first well; and

a concentration of the second impurity layer is higher than the second semiconductor layer and the second well.

18. The semiconductor device according to claim 10 , wherein

a part of the first semiconductor layer is located under the first gate insulating film and between the first source/drain region, and

a part of the second semiconductor layer is located under the second gate insulating film and between the second source/drain region.

Assignments (2)
CHANGE OF ADDRESS Recorded Dec 23, 2016
From: FUJITSU SEMICONDUCTOR LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 041188/0401 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2012
From: EMA, TAIJI; FUJITA, KAZUSHI; OH, JUNJI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 029296/0170 →
Priority Claims (1)
JP 2010-220774 · Sep 30, 2010 · national
Continuity (2)
Division 13172224 · Jun 29, 2011
Related Publication 20130020650A1 · Jan 24, 2013