IP Library Granted Patent US 8,653,806
Granted Patent B2
US 8,653,806 · App. 13/628,819 · Granted Feb 18, 2014

Bandgap reference circuit and method of starting bandgap reference circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,653,806
App. No.
13/628,819
Granted
Feb 18, 2014
Kind
B2
Abstract

In accordance with a bandgap circuit and a method of starting the bandgap circuit, a start signal is continuously supplied to a differential amplifier circuit to start up the differential amplifier circuit that controls a bandgap core circuit until the differential amplifier circuit has started up, and then the supply of the start signal to the differential amplifier circuit is discontinued after the differential amplifier circuit has started up.

Claims (51)

1. The semiconductor device comprising:

a first transistor coupled between a first power supply line and a first node and including a control electrode coupled to a first common node;

a second transistor coupled between the first power supply line and a second node and including a control electrode coupled to the first common node;

a first diode coupled between the first node and a second power supply line;

a second diode and a first resistor coupled in series between the second node and the second power supply line;

a third transistor coupled between the first power supply line and a reference voltage output terminal and including a control electrode coupled to the first common node;

a differential amplifying circuit that includes an output terminal coupled to the first common node, a first input terminal coupled to the first node, and a second input terminal coupled to the second node;

a control circuit including an output node coupled to the first node and including an input node coupled to the reference voltage output terminal or the second node;

wherein the control circuit includes a fourth transistor coupled between the first node and the first power supply line, the fourth transistor including a control electrode coupled to a third node, a fifth transistor coupled between the third node and the first power supply line, a sixth transistor coupled between the first power supply line and a fourth node and including a control electrode coupled to a control electrode of the fifth transistor and the fourth node, and a seventh transistor coupled between the fourth node and a fifth node and including a control electrode coupled to the reference voltage output terminal or the second node.

2. The semiconductor device according to claim 1 , wherein the control circuit includes an eighth transistor coupled between the first power line and the fifth node, the eighth transistor including a control electrode coupled to the first node.

3. The semiconductor device according to claim 1 , wherein the differential amplifying circuit including a fourth transistor coupled between the first power supply line and the first common node, a fifth transistor coupled between the first power line and a control electrode of the fourth transistor and including a control electrode coupled to the control electrode of the fourth transistor, a sixth transistor coupled to the first common node and a second common node and including a control electrode coupled to the first node, and a seventh transistor coupled between the control electrode of the fourth transistor and the second common node and including a control electrode coupled to the second node.

4. The semiconductor device according to claim 1 , wherein the first and second transistors, the first and second diodes, and the first resistor configure a part of a bandgap circuit.

5. The semiconductor device comprising:

a first transistor coupled between a first power supply line and a first node and including a control electrode coupled to a first common node;

a second transistor coupled between the first power supply line and a second node and including a control electrode coupled to the first common node;

a first diode coupled between the first node and a second power supply line;

a second diode and a first resistor coupled in series between the second node and the second power supply line;

a third transistor coupled between the first power supply line and a reference voltage output terminal and including a control electrode coupled to the first common node;

a differential amplifying circuit that includes an output terminal coupled to the first common node, a first input terminal coupled to the first node, and a second input terminal coupled to the second node; and

a control circuit including an output node coupled to the first node and including an input node coupled to the reference voltage output terminal;

wherein the control circuit includes a fourth transistor coupled to the first power supply line and a third node and the fourth transistor including a control electrode coupled to the third node, a fifth transistor coupled to the third node and including a control electrode coupled to the reference voltage output terminal, a sixth transistor coupled to the first power supply line and a fourth node and including a control electrode coupled to the third node, and a seventh transistor coupled between the first power supply line and the first node and including a control electrode coupled to the fourth node.

6. The semiconductor device according to claim 5 , wherein the first and second transistors, the first and second diode, and the first resistor configure a part of a bandgap circuit.

7. A semiconductor device comprising:

a first transistor coupled between a first power supply line and a first node and including a control electrode coupled to a first common node;

a second transistor coupled between the first power supply line and a second node and including a control electrode coupled to the first common node;

a first diode coupled between the first node and a second power supply line;

a second diode and a first resistor coupled in series between the second node and the second power supply line;

a first differential amplifying circuit that includes an output terminal coupled to the first common node, a first input terminal coupled to the first node, and a second input terminal coupled to the second node;

a control circuit including an output node coupled to the first node and including an input node coupled to the second node;

wherein the control circuit includes a second differential circuit including a first input node coupled to the first node and a second input node coupled to the second node,

wherein the control circuit includes a third transistor coupled between the first power supply line and the first node.

8. The semiconductor device according to claim 7 , wherein the second differential circuit includes an output node indirectly connected to the control electrode of the third transistor.

9. The semiconductor device according to claim 7 , wherein the second differential circuit includes an output node coupled to the control electrode of the third transistor.

10. A semiconductor device comprising:

a first transistor coupled between a first power supply line and a first node and including a control electrode coupled to a first common node;

a second transistor coupled between the first power supply line and a second node and including a control electrode coupled to the first common node;

a first diode coupled between the first node and a second power supply line;

a second diode and a first resistor coupled in series between the second node and the second power supply line;

a first differential amplifying circuit that includes an output terminal coupled to the first common node, a first input terminal coupled to the first node, and a second input terminal coupled to the second node;

a control circuit including an output node coupled to the first node and including an input node coupled to the second node;

wherein the control circuit includes a second differential circuit including a first input node coupled to the first node and a second input node coupled to the second node,

wherein the second differential circuit includes an output node indirectly connected to the control electrode of the third transistor.

11. A semiconductor device comprising:

a first transistor coupled between a first power supply line and a first node and including a control electrode coupled to a first common node;

a second transistor coupled between the first power supply line and a second node and including a control electrode coupled to the first common node;

a first diode coupled between the first node and a second power supply line;

a second diode and a first resistor coupled in series between the second node and the second power supply line;

a first differential amplifying circuit that includes an output terminal coupled to the first common node, a first input terminal coupled to the first node, and a second input terminal coupled to the second node;

a control circuit including an output node coupled to the first node and including an input node coupled to the second node;

wherein the control circuit includes a second differential circuit including a first input node coupled to the first node and a second input node coupled to the second node, wherein the control circuit includes a third transistor coupled between the first power supply line and the first node and the third transistor including a control electrode coupled to a third node, a fourth transistor coupled between the third node and the first power supply line, a fifth transistor coupled between the first power supply line and a fourth node and including a control electrode coupled to a control electrode of the fourth transistor and the fourth node, and a sixth transistor coupled between the fourth node and a fifth node and including a control electrode coupled to the second node.

12. The semiconductor device according to claim 11 , wherein the control circuit includes an eighth transistor coupled between the first power line and the fifth node and including a control electrode coupled to the first node.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046865/0667 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032899/0588 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →