IP Library Granted Patent US 8,952,421
Granted Patent B2
US 8,952,421 · App. 13/651,896 · Granted Feb 10, 2015

RF power HEMT grown on a silicon or SiC substrate with a front-side plug connection

Inventors: Gilberto Curatola (Villach, AT); Gianmauro Pozzovivo (Villach, AT); Simone Lavanga (Drobollach, AT)
Assignee: Infineon Technologies Austria AG
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Quick Facts
Patent No.
US 8,952,421
App. No.
13/651,896
Granted
Feb 10, 2015
Kind
B2
Abstract

A compound semiconductor device includes a plurality of high-resistance crystalline silicon epitaxial layers and a plurality of activated dopant regions disposed in a same region of at least some of the epitaxial layers so that the activated dopant regions are aligned in a vertical direction perpendicular to a main surface of the epitaxial layers. The compound semiconductor device further includes an III-nitride compound semiconductor device structure disposed on the main surface of the epitaxial layers. The III-nitride compound semiconductor device structure has a source, a drain and a gate. An electrically conductive structure is formed from the activated dopant regions. The electrically conductive structure extends in the vertical direction through the epitaxial layers with the activated dopant regions toward the III-nitride compound semiconductor device structure, and is electrically connected to the source.

Claims (52)

1. A method of manufacturing a compound semiconductor device, comprising:

growing a plurality of high-resistance crystalline silicon epitaxial layers on a crystalline semiconductor substrate;

forming a plurality of inactive dopant regions in at least some of the epitaxial layers, the inactive dopant regions being aligned in a vertical direction perpendicular to a main surface of the epitaxial layers;

forming a III-nitride compound semiconductor device structure on the epitaxial layers, the III-nitride compound semiconductor device structure including a source, a drain and a gate; and

activating the inactive dopant regions to form an electrically conductive structure from the activated dopant regions which extends from the substrate in the vertical direction toward the III-nitride compound semiconductor device structure and is electrically connected to the source.

2. The method of claim 1 , wherein the substrate is a doped or undoped crystalline silicon substrate having a growth surface with a [111]crystal orientation on which the epitaxial layers are grown.

3. The method of claim 1 , wherein the substrate is a doped or undoped crystalline silicon carbide substrate having a growth surface with a [100] crystal orientation on which the epitaxial layers are grown.

4. The method of claim 1 , wherein each epitaxial layer has at least one of the activated dopant regions.

5. The method of claim 1 , wherein one or more of the epitaxial layers disposed closest to the III-nitride compound semiconductor device structure are devoid of the activated dopant regions.

6. The method of claim 1 , further comprising:

forming a trench which extends in the vertical direction through the III-nitride compound semiconductor device structure to the activated dopant region closest to the III -nitride compound semiconductor device structure;

filling the trench with an electrically conductive material which contacts the electrically conductive structure at a first end of the electrically conductive material; and

forming the source in contact with the electrically conductive material at a second end of the electrically conductive material which opposes the first end.

7. The method of claim 1 , wherein the substrate is heavily doped, the method further comprising:

thinning the heavily doped substrate at a side of the heavily doped substrate facing away from the epitaxial layers; and

forming a metallization on the side of the thinned heavily doped substrate facing away from the epitaxial layers so that the metallization is electrically connected to the electrically conductive structure through the thinned heavily doped substrate.

8. The method of claim 1 , further comprising:

removing the substrate; and

forming a metallization on a main surface of the epitaxial layers from which the substrate was removed so that the metallization contacts an end of the electrically conductive structure facing away from the III-nitride compound semiconductor device structure.

9. The method according to claim 1 , wherein the epitaxial layers are grown and implanted with dopants in succession to form the inactive dopant regions.

10. The method of claim 1 , wherein forming the III-nitride compound semiconductor device structure on the epitaxial layers comprises:

forming one or more transition layers on the epitaxial layers;

forming GaN on the one or more transition layers; and

forming a GaN alloy on the GaN.

11. A compound semiconductor device, comprising:

a plurality of high-resistance crystalline silicon epitaxial layers;

a plurality of activated dopant regions disposed in a same region of at least some of the epitaxial layers so that the activated dopant regions are aligned in a vertical direction perpendicular to a main surface of the epitaxial layers;

an III-nitride compound semiconductor device structure disposed on the main surface of the epitaxial layers, the III-nitride compound semiconductor device structure including a source, a drain and a gate; and

an electrically conductive structure formed from the activated dopant regions, the electrically conductive structure extending in the vertical direction through the epitaxial layers with the activated dopant regions toward the III-nitride compound semiconductor device structure and being electrically connected to the source.

12. The compound semiconductor device of claim 11 , wherein each epitaxial layer has at least one of the activated dopant regions.

13. The compound semiconductor device of claim 11 , wherein one or more of the epitaxial layers disposed closest to the III-nitride compound semiconductor device structure are devoid of the activated dopant regions.

14. The compound semiconductor device of claim 11 , further comprising:

a trench extending in the vertical direction through the III-nitride compound semiconductor device structure to the activated dopant region closest to the III-nitride compound semiconductor device structure; and

an electrically conductive material disposed in the trench which contacts the electrically conductive structure at a first end and contacts the source at a second opposing end.

15. The compound semiconductor device of claim 11 , further comprising:

a thinned heavily doped semiconductor substrate adjacent a second main surface of the epitaxial layers facing away from the III-nitride compound semiconductor device structure; and

a metallization on a side of the thinned heavily doped semiconductor substrate facing away from the epitaxial layers, the metallization being electrically connected to the electrically conductive structure through the thinned heavily doped semiconductor substrate.

16. The compound semiconductor device of claim 11 , further comprising a metallization on a second main surface of the epitaxial layers facing away from the III-nitride compound semiconductor device structure, and wherein the metallization contacts an end of the electrically conductive structure facing away from the III-nitride compound semiconductor device structure.

17. The compound semiconductor device of claim 11 , wherein the III-nitride compound semiconductor device structure comprises:

one or more transition layers on the epitaxial layers;

GaN on the one or more transition layers; and

a GaN alloy on the GaN.

18. An RF compound semiconductor device, comprising:

a plurality of high-resistance crystalline silicon epitaxial layers;

a plurality of activated dopant regions disposed in a same region of at least some of the epitaxial layers so that the activated dopant regions align in a vertical direction perpendicular to a first main surface of the epitaxial layers;

an III-nitride compound semiconductor device structure disposed on the main surface of the epitaxial layers, the III-nitride compound semiconductor device structure including a source, a drain and a gate of an RF device;

a metallization on a second main surface of the epitaxial layers which opposes the first main surface; and

an electrically conductive structure formed from the activated dopant regions, the electrically conductive structure contacting the metallization at one end and extending in the vertical direction through the epitaxial layers with the activated dopant regions toward the III-nitride compound semiconductor device structure and being electrically connected to the source of the RF device.

19. The RF compound semiconductor device of claim 18 , wherein each epitaxial layer has at least one of the activated dopant regions.

20. The RF compound semiconductor device of claim 18 , further comprising:

a trench extending in the vertical direction through the III-nitride compound semiconductor device structure to the activated dopant region closest to the III -nitride compound semiconductor device structure; and

an electrically conductive material disposed in the trench which contacts the electrically conductive structure at a first end and contacts the source of the RF device at a second opposing end.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2012
From: CURATOLA, GILBERTO; LAVANGA, SIMONE; POZZOVIVO, GIANMAURO
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 029129/0697 →
Continuity (1)
Related Publication 20140103398A1 · Apr 17, 2014