IP Library Granted Patent US 8,803,287
Granted Patent B2
US 8,803,287 · App. 13/653,461 · Granted Aug 12, 2014

Electronic device comprising a semiconductor structure having an integrated circuit back end capacitor and thin film resistor and method of manufacturing the same

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Quick Facts
Patent No.
US 8,803,287
App. No.
13/653,461
Granted
Aug 12, 2014
Kind
B2
Abstract

An electronic device comprising a semiconductor structure having an integrated circuit back end capacitor and an integrated circuit back end thin film resistor and a method of manufacturing the same is provided. The semiconductor structure comprises a first dielectric layer, a bottom plate of the capacitor and a thin film resistor body. Furthermore, there is a second dielectric layer which is disposed on the bottom plate of the capacitor and on top of the thin film resistor body. A top plate of the capacitor is disposed on the second dielectric layer in a region of the second dielectric layer which is defined by the lateral dimensions of the bottom plate of the capacitor. The bottom plate and the resistor body are laterally spaced apart layers which are both disposed on the first dielectric layer and which are composed of a same thin film material.

Claims (16)

1. An electronic device comprising a semiconductor structure having an integrated circuit back end capacitor and an integrated circuit back end thin film resistor, the semiconductor structure comprising:

a first dielectric layer;

a bottom plate of the capacitor and a thin film resistor body;

a second dielectric layer disposed on the bottom plate of the capacitor and on the thin film resistor body and

a top plate of the capacitor disposed on the second dielectric layer in a region of the second dielectric layer which is defined by the lateral dimensions of the bottom plate of the capacitor,

wherein the bottom plate and the resistor body are laterally spaced apart layers which are both disposed on the first dielectric layer and which are composed of a same thin film material;

wherein the first dielectric layer is deposited on a first metallization layer of the semiconductor structure;

wherein the thin film material for the bottom plate of the capacitor and for the thin film resistor body is composed of SiCr, the second dielectric layer is composed of silicon nitride and the top plate of the capacitor is composed of titanium nitride.

2. The electronic device according to claim 1 , wherein the thin film material of the bottom plate and the resistor body and the material of the top plate of the capacitor is metallic material.

3. The electronic device according to claim 1 , further comprising a third dielectric layer which is disposed on the top plate of the capacitor and which is disposed on the second dielectric layer in a region which is defined by the lateral dimensions of the thin film resistor body.

4. The electronic device according to claim 3 , further comprising a first vertical interconnect extending through a first vertical via, wherein the first vertical interconnect extends through the third dielectric layer and the first vertical interconnect is coupled to the top plate of the capacitor.

5. The electronic device according to claim 4 , further comprising a second vertical interconnect extending through a second vertical via, wherein the second vertical interconnect extends through the third dielectric layer, and wherein the second vertical interconnect is coupled to the bottom plate of the capacitor.

6. The electronic device according to claim 5 , further comprising a third vertical interconnect extending through a third vertical via, wherein the third vertical interconnect extends through the third dielectric layer, and wherein the third vertical interconnect is coupled to the thin film resistor body.

7. The electronic device according to claim 3 , wherein a second metallization layer of the semiconductor structure is disposed on the third dielectric layer.

8. The electronic device according to claim 7 , wherein the first vertical interconnect is for electrically connecting the top plate of the capacitor to the second metallization layer, the second vertical interconnect is for electrically connecting the bottom plate of the capacitor to the second metallization layer and the third vertical interconnect is for electrically connecting the thin film resistor layer to the second metallization layer.

9. The electronic device according to claim 6 , wherein the second dielectric layer which is disposed on the bottom plate of the capacitor and on the thin film resistor body layer is an etch-stop layer for the patterning of the top capacitor plate.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 16, 2021
From: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 055314/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 4, 2012
From: DIRNECKER, CHRISTOPH; STAUFER, BERTHOLD
To: TEXAS INSTRUMENTS DEUTSCHLAND GMBH
Reel/Frame 029398/0466 →