Real-time module protection
View Patent ↗Technologies for securing an electronic device include trapping an attempt to access a secured system resource of the electronic device, determining a module associated with the attempt, determining a subsection of the module associated with the attempt, the subsection including a memory location associated with the attempt, accessing a security rule to determine whether to allow the attempted access based on the determination of the module and the determination of the subsection, and handling the attempt based on the security rule. The module includes a plurality of distinct subsections.
1. A method for securing an electronic device, comprising:
trapping an attempt to access a secured system resource of the electronic device;
determining a module associated with the attempt, the module comprising a plurality of distinct subsections;
determining a subsection of the module associated with the attempt, the subsection including a memory location associated with the attempt, including:
determining a byte string corresponding to a range including an instruction address that caused the attempt, the range to include a defined number of bytes surrounding the instruction address; and
comparing the byte string against mappings of the subsection in a security rule;
based on the determination of the module and the determination of the subsection, accessing the security rule to determine whether to allow the attempt; and
handling the attempt based on the security rule.
2. The method of claim 1 , wherein:
the trapping is conducted at a level below all of the operating systems of the electronic device; and
handling the attempt is conducted at least in part at a level below all of the operating systems of the electronic device.
3. The method of claim 1 , wherein the memory location identifies a point of origin of the attempt.
4. The method of claim 1 , further comprising:
identifying another memory location that identifies a target point of the attempt; and
accessing the security rule to determine whether to allow the attempt further based upon the target point of the attempt.
5. The method of claim 1 , further comprising:
identifying another subsection as a target of the attempt and as a data subsection; and
accessing the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a data subsection.
6. The method of claim 1 , further comprising:
identifying another subsection as a target of the attempt and as a header subsection; and
accessing the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a header subsection.
7. The method of claim 1 , further comprising:
identifying another subsection as a target of the attempt and as a code subsection; and
accessing the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a code subsection.
8. The method of claim 1 , wherein the security rule:
identifies a target of the attempt as a code subsection; and
based at least on an identification of the target of the attempt as a code subsection, specifies that handling the attempt includes denying an attempted write to the code subsection.
9. The method of claim 1 , wherein the security rule:
identifies a target of the attempt as a header subsection; and
based at least on an identification of the target of the attempt as a header subsection, specifies that handling the attempt includes denying an attempted write to the header subsection.
10. The method of claim 1 , wherein the security rule:
identifies a target of the attempt as a data subsection; and
based at least on an identification of the target of the attempt as a data subsection, specifies that handling the attempt includes allowing an attempted write to the data subsection.
11. At least one non-transitory machine readable storage medium, comprising computer-executable instructions carried on the non-transitory machine readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to:
trap an attempt to access a secured system resource of an electronic device;
determine a module associated with the attempt, the module comprising a plurality of distinct subsections;
determine a subsection of the module associated with the attempt, the subsection including a memory location associated with the attempt, including instructions for further causing the processor to:
determine a byte string corresponding to a range including an instruction address that caused the attempt, the range to include a defined number of bytes surrounding the instruction address; and
compare the byte string against mappings of the subsection in a security rule;
based on the determination of the module and the determination of the subsection, access the security rule to determine whether to allow the attempt; and
handle the attempt based on the security rule.
12. The medium of claim 11 , wherein:
the trapping is conducted at a level below all of the operating systems of the electronic device; and
handling the attempt is conducted at least in part at a level below all of the operating systems of the electronic device.
13. The medium of claim 11 , wherein the memory location identifies a point of origin of the attempt.
14. The medium of claim 11 , further comprising instructions for causing the processor to:
identify another memory location as a target point of the attempt; and
access the security rule to determine whether to allow the attempt further based upon the target point of the attempt.
15. The medium of claim 11 , further comprising instructions for causing the processor to:
identify another subsection as a target of the attempt and as a data subsection; and
access the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a data subsection.
16. The medium of claim 11 , further comprising instructions for causing the processor to:
identify another subsection as a target of the attempt and as a header subsection; and
access the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a header subsection.
17. The medium of claim 11 , further comprising instructions for causing the processor to:
identify another subsection as a target of the attempt and as a code subsection; and
access the security rule to determine whether to allow the attempt further based upon the identification of the other subsection as a target of the attempt and as a code subsection.
18. The medium of claim 11 , wherein the security rule:
identifies a target of the attempt as a code subsection; and
based at least on an identification of the target of the attempt as a code subsection, specifies that handling the attempt includes denying an attempted write to the code subsection.
19. The medium of claim 11 , wherein the security rule:
identifies a target of the attempt as a header subsection; and
based at least on an identification of the target of the attempt as a header subsection, specifies that handling the attempt includes denying an attempted write to the header subsection.
20. The medium of claim 11 , wherein the security rule:
identifies a target of the attempt as a data subsection; and
based at least on an identification of the target of the attempt as a data subsection, specifies that handling the attempt includes allowing an attempted write to the data subsection.
21. A system for securing an electronic device, comprising:
a memory;
a processor;
a secured system resource; and
one or more security agents including instructions resident in the memory and operable for execution by the processor, wherein the security agents are configured to:
trap an attempt to access the secured system resource;
determine a module associated with the attempt, the module comprising a plurality of distinct subsections;
determine a subsection of the module associated with the attempt, the subsection including a memory location associated with the attempt, wherein the security agents are further configured to:
determine a byte string corresponding to a range including an instruction address that caused the attempt, the range to include a defined number of bytes surrounding the instruction address; and
compare the byte string against mappings of the subsection in a security rule;
based on the determination of the module and the determination of the subsection, accessing the security rule to determine whether to allow the attempt; and
handling the attempt based on the security rule.
22. The system of claim 21 , wherein the security agents are further configured to:
conduct the trapping at a level below all of the operating systems of the electronic device; and
conduct the handling at least in part at a level below all of the operating systems of the electronic device.
23. The system of claim 21 , wherein the memory location identifies a point of origin of the attempt.
24. The system of claim 21 , wherein the security agents are further configured to:
identify another memory location that identifies a target point of the attempt; and
accessing the security rule to determine whether to allow the attempted access further based upon the target point of the attempt.
25. The system of claim 21 , wherein the security agents are further configured to:
identify another subsection as a target of the attempt and as a data subsection; and
access the security rule to determine whether to allow the attempted access further based upon the identification of the other subsection as a target of the attempt and as a data subsection.
26. The system of claim 21 , wherein the security agents are further configured to:
identify another subsection as a target of the attempt and as a header subsection; and
access the security rule to determine whether to allow the attempted access further based upon the identification of the other subsection as a target of the attempt and as a header subsection.
27. The system of claim 21 , wherein the security agents are further configured to:
identify another subsection as a target of the attempt and as a code subsection; and
access the security rule to determine whether to allow the attempted access further based upon the identification of the other subsection as a target of the attempt and as a code subsection.
28. The system of claim 21 , wherein the security rule:
identifies a target of the attempt as a code subsection; and
based at least on an identification of the target of the attempt as a code subsection, specifies that handling the attempt includes denying an attempted write to the code subsection.
29. The system of claim 21 , wherein the security rule:
identifies a target of the attempt as a header subsection; and
based at least on an identification of the target of the attempt as a header subsection, specifies that handling the attempt includes denying an attempted write to the header subsection.
30. The system of claim 21 , wherein the security rule:
identifies a target of the attempt as a data subsection; and
based at least on an identification of the target of the attempt as a data subsection, specifies that handling the attempt includes allowing an attempted write to the data subsection.