Junction field effect transistor and analog circuit

1. A junction field effect transistor comprising:

a semiconductor substrate having a first conductivity type;

a channel region having a second conductivity type different from the first conductivity type, and being formed in a surface of the semiconductor substrate;

a first buried region having the second conductivity type, being formed within the channel region, and having an impurity concentration higher than the channel region;

a first gate region having the first conductivity type, and being formed in a surface of the channel region; and

a first source region and a drain region both having the second conductivity type, which are formed each on an opposite side of the first gate region in the surface of the channel region,

wherein the first buried region is formed below the first source region and apart from the first source region, and no buried region is formed below the drain region when viewed in plan, and

the first buried region is not formed below the first gate region.

2. The junction field effect transistor according to claim 1 , further comprising:

a second gate region formed in the surface of the channel region so that the drain region is located between the second gate region and the first gate region;

a second source region formed in the surface of the channel region so that the second gate region is located between the second source region and the drain region;

a first line electrically connecting the first gate region to the second gate region;

a second line electrically connecting the first source region to the second source region; and

a second buried region having the second conductivity type, being formed below the second source region and apart from the second source region within the channel region, and having the impurity concentration higher than the channel region.

3. The junction field effect transistor according to claim 1 , wherein the first gate region surrounds the drain region, and the first source region surrounds the first gate region.

4. An analog circuit comprising:

a first junction field effect transistor which is the junction field effect transistor according to claim 1 ;

an output terminal;

a power-supply terminal; and

a ground potential terminal,

wherein the first junction field effect transistor has the first source region connected to a side of the power-supply terminal or a side of the ground potential terminal, and

the first junction field effect transistor has the drain region connected to a side of the output terminal.

5. The analog circuit according to claim 4 , wherein the first junction field effect transistor has the drain region connected directly to the output terminal.

6. The analog circuit according to claim 4 , wherein the first junction field effect transistor has the first source region connected directly to the power-supply terminal or the ground potential terminal.

7. The analog circuit according to claim 6 ,

wherein the analog circuit is a source-grounded amplifier circuit which has an input terminal, and

the first junction field effect transistor has the first gate region connected to the input terminal.

8. The analog circuit according to claim 5 ,

wherein the analog circuit is a differential amplifier circuit which has two differential input terminals;

the analog circuit includes a second junction field effect transistor which is the junction field effect transistor according to claim 1 ;

the first and second junction field effect transistors serve as a differential pair;

the first junction field effect transistor has the first gate region connected to one of the differential input terminals; and

the second junction field effect transistor has the first gate region connected to the other of the differential input terminals.