Epitaxial wafer and manufacturing method thereof

1. A method for depositing an epitaxial layer in a semiconductor device, the method comprising:

providing a substrate;

depositing a conductive layer on the substrate;

patterning the conductive layer to include a first pattern and a second pattern, the first pattern and the second pattern including a major surface and a plurality of grids defined in the major surface, the-first pattern including a plurality of first lines between adjacent grids and a connecting portion, wherein the second pattern including at least two first patterns, each of the at least two first patterns being separated by a second line, the connecting portion is being connected to an electrode and adjacent to the second line, wherein the first lines have a different width than the second lines; and

depositing an epitaxial layer on the patterned conductive layer, comprising

depositing a first layer on the patterned conductive layer, the first layer including a first type of semiconductor material,

depositing an active layer on the first layer, and

depositing a second layer on the active layer, the second layer including a second type of semiconductor material, wherein the epitaxial layer covers the grids and the first lines between the grids, and wherein the second line has a width of about 5-1000 μm.

2. The method of claim 1 , wherein the first line has a width of about 1-20 μm.

3. The method of claim 1 , further comprising patterning the conductive layer to include a third pattern, the third pattern including at least two second patterns, each of the at least two second patterns being separated by a third line major surface, wherein the third line has a width of about 200-5000 μm.

4. The method of claim 3 , wherein the connecting portion is adjacent to one of the second line or the third line.

5. The method of claim 1 , wherein the shape of the grids comprises one of polygon, ellipse or circle shapes.