IP Library › Granted Patent US 9,294,067
Granted Patent B2
US 9,294,067 · App. 13/668,743 · Granted Mar 22, 2016

Combined balun transformer and harmonic filter

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Quick Facts
Patent No.
US 9,294,067
App. No.
13/668,743
Granted
Mar 22, 2016
Kind
B2
Abstract

In one embodiment, a balanced to unbalanced transformer utilizes a crossover configuration such that some portion of the secondary coil (inductor) is shared between two resonators (capacitors). Adding a first capacitor in parallel with a portion of the secondary inductor creates a first harmonic trap (filter), and also efficiently uses the secondary coil (inductor) as a resonating element. Adding a second capacitor which shares (crossover configuration) a portion of the secondary inductor with the first capacitor creates a second harmonic trap (filter), which may be tuned to the same harmonic as the first harmonic trap, or may be tuned to a different harmonic.

Claims (51)

1. A circuit for transforming and filtering, the circuit comprising:

a main central secondary inductor having a top and a bottom;

a first filtering capacitor coupled between the top and the bottom of the main central secondary inductor;

a first unbalanced side secondary inductor having a top coupled to an unbalanced port and a bottom coupled to the top of the main central secondary inductor;

a ground side secondary inductor having a top coupled to the bottom of the main central secondary inductor and a bottom coupled directly to ground; and

a secondary capacitor linking the top of the first unbalanced side secondary inductor to ground.

2. The circuit of claim 1 ,

wherein the main central secondary inductor is segmented into a first central secondary inductor and a second central secondary inductor,

wherein the first central secondary inductor has a top corresponding to the top of the main central secondary inductor, and has a bottom; and

wherein the second central secondary inductor has a top linked to the bottom of the first central secondary inductor, and has a bottom corresponding to the bottom of the main central secondary inductor.

3. The circuit of claim 2 , further comprising:

a first primary inductor having a top coupled to a first balanced port and a bottom and configured to magnetically communicate with the first unbalanced side secondary inductor, wherein the top of the first primary inductor is in phase with the top of the first unbalanced side secondary inductor;

a second primary inductor having a top coupled to the bottom of the first primary inductor and a bottom and configured to magnetically communicate with the first central secondary inductor, wherein the top of the second primary inductor is in phase with the top of the first central secondary inductor;

a third primary inductor having a top coupled to the bottom of the second primary inductor and a bottom and configured to magnetically communicate with the second central secondary inductor, wherein the top of the third primary inductor is in phase with the top of the second central secondary inductor; and

a fourth primary inductor having a top coupled to the bottom of the third primary inductor and a bottom coupled to a second balanced port and configured to magnetically communicate with the ground side secondary inductor, wherein the top of the fourth primary inductor is in phase with the top of the ground side secondary inductor.

4. The circuit of claim 3 , further comprising:

a primary capacitor coupled between the top of the first primary inductor and the bottom of the fourth primary inductor.

5. The circuit of claim 2 , further comprising:

a second filtering capacitor coupled between the top of the second central secondary inductor and ground.

6. A circuit for transforming and filtering, the circuit comprising:

a first central secondary inductor having a top coupled directly to an unbalanced port and a bottom;

a second central secondary inductor having a top coupled to the bottom of the first central secondary inductor and a bottom;

a first ground side secondary inductor having a top coupled to the bottom of the second central secondary inductor and a bottom coupled to ground;

a secondary capacitor coupled between the top of the first central secondary inductor and ground such that a first side of the secondary capacitor is coupled directly to the top of the first central secondary inductor and a second side of the secondary capacitor is coupled directly to ground; and

a first filtering capacitor coupled between the top of the first central secondary inductor and the bottom of the second central secondary inductor such that a first side of the first filtering capacitor is coupled directly to the top of the first central secondary inductor and a second side of the first filtering capacitor is coupled directly to the bottom of the second central secondary inductor.

7. The circuit of claim 6 , further comprising:

a second filtering capacitor coupled between the top of the second central secondary inductor and ground.

8. The circuit of claim 6 , further comprising:

a first primary inductor having a top coupled to a first balanced port and a bottom, and configured for magnetic communication with the first central secondary inductor, such that the top of the first primary inductor is in phase with the top of the first central secondary inductor;

a second primary inductor having a top coupled to the bottom of the first primary inductor and a bottom, and configured for magnetic communication with the second central secondary inductor;

a third primary inductor having a top coupled to the bottom of the second primary inductor and a bottom coupled to a second balanced port; and configured for magnetic communication with the first ground side secondary inductor; and

a primary capacitor coupled between the top of the first primary inductor and the bottom of the third primary inductor.

9. A circuit for transforming and filtering, the circuit comprising:

an unbalanced side secondary inductor having a top coupled to an unbalanced port and a bottom;

a first central secondary inductor having a top coupled to the bottom of the unbalanced side secondary inductor and a bottom;

a second central secondary inductor having a top coupled to the bottom of the first central secondary inductor and a bottom;

a first ground side secondary inductor having a top coupled to the bottom of the second central secondary inductor and a bottom;

a second ground side secondary inductor having a top coupled to the bottom of the first ground side secondary inductor and a bottom;

a third ground side secondary inductor having a top coupled to the bottom of the second ground side secondary inductor and a bottom coupled directly to ground;

a secondary capacitor coupled between the top of the unbalanced side secondary inductor and ground; and

a first filtering capacitor coupled between the top of the first central secondary inductor and the bottom of the second central secondary inductor.

10. The circuit of claim 9 , further comprising:

a second filtering capacitor coupled between the top of the second central secondary inductor and ground.

11. The circuit of claim 10 , further comprising:

a first primary inductor having a top coupled to a first balanced port and a bottom, and configured for magnetic communication with the unbalanced side secondary inductor, such that the top of the first primary inductor is in phase with the top of the unbalanced side secondary inductor;

a second primary inductor having a top coupled to the bottom of the first primary inductor and a bottom, and configured for magnetic communication with the first central secondary inductor;

a third primary inductor having a top coupled to the bottom of the second primary inductor and a bottom, and configured for magnetic communication with the second central secondary inductor;

a fourth primary inductor having a top coupled to the bottom of the third primary inductor and a bottom, and configured for magnetic communication with the first ground side secondary inductor;

a fifth primary inductor having a top coupled to the bottom of the fourth primary inductor and a bottom, and configured for magnetic communication with the second ground side secondary inductor;

a sixth primary inductor having a top coupled to the bottom of the fifth primary inductor and a bottom coupled to a second balanced port, and configured for magnetic communication with the third ground side secondary inductor; and

a primary capacitor coupled between the top of the first primary inductor and the bottom of the sixth primary inductor.

Assignments (4)
MERGER Recorded Jun 16, 2016
From: RF MICRO DEVICES, INC.
To: QORVO US, INC.
Reel/Frame 039196/0941 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS (RECORDED 3/19/13 AT REEL/FRAME 030045/0831) Recorded Mar 30, 2015
From: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
To: RF MICRO DEVICES, INC.
Reel/Frame 035334/0363 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Mar 19, 2013
From: RF MICRO DEVICES, INC.
To: BANK OF AMERICA, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 030045/0831 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2012
From: ZYBURA, MICHAEL F.; GRANGER-JONES, MARCUS
To: RF MICRO DEVICES, INC.
Reel/Frame 029242/0001 →