Method for fabricating a semiconductor device

1. A method, comprising:

forming a gate stack over a substrate;

forming a spacer adjoining a sidewall of the gate stack;

forming a first recess in the substrate adjacent to an edge of the gate stack;

thereafter, forming a sacrificial layer adjoining the spacer;

removing a portion of the sacrificial layer to expose a lower portion of the spacer;

removing at least a portion of the exposed spacer to form a second recess in the exposed lower portion of the spacer; and

forming a strain feature in the second recess.

2. The method of claim 1 , further comprising:

forming a capping layer over the strain feature.

3. The method of claim 1 , further comprising:

removing the remaining portion of the sacrificial layer before forming the strain feature.

4. The method of claim 1 , wherein the sacrificial layer is formed over the surface of the first recess.

5. The method of claim 4 , wherein the step of removing the portion of the sacrificial layer includes removing the sacrificial layer over the surface of the first recess.

6. The method of claim 1 , wherein the strain feature is SiGe.

7. The method of claim 1 , wherein the strain feature is formed by an epitaxial growth process.

8. The method of claim 1 , wherein the sacrificial layer includes a material of C x H y .

9. The method of claim 8 , wherein the material of C x H y is formed using a precursor including C 3 H 8 , CH 4 , or combination thereof.

10. The method of claim 1 , wherein the sacrificial layer is formed over the gate stack with a thickness greater than a thickness of the portion of sacrificial layer adjoining the spacers.

11. The method of claim 1 , wherein the sacrificial layer adjoining the spacer has an upper sidewall portion with a first thickness and a lower sidewall portion with a second thickness, and the second thickness is less than the first thickness.

12. The method of claim 11 , wherein a ratio of the second thickness over the first thickness is less than about 50%.

13. A method for forming a semiconductor device, comprising:

forming a gate stack over a substrate;

forming respective spacers adjoining respective opposite sidewalls of the gate stack;

forming respective first recesses in the substrate adjacent to respective opposite edges of the gate stack;

thereafter, forming a carbon-containing layer adjoining the spacers, in the first recesses, and over the gate stack and the substrate;

removing first portions of the carbon-containing layer to expose respective lower portions of the spacers, while leaving second portions of the carbon-containing layer to protect respective upper portions of the spacers;

removing at least a portion of the respective exposed spacers to form respective second recesses below respective non-removed portions of the spacers;

removing the remaining portion of the carbon-containing layer; and

forming a strain feature in the first recesses and the second recesses.

14. The method of claim 13 , wherein the spacers comprise a material of silicon nitride, SiCN, or combination thereof.

15. The method of claim 13 , wherein the step of removing the portion of the carbon-containing layer is performed using a dry etching process with O-containing gas.

16. The method of claim 13 , wherein the carbon-containing layer adjoining the respective upper portions of the respective spacers has a thickness different from a thickness of the carbon-containing layer adjoining the respective lower portions of the respective spacers.

17. The method of claim 13 , wherein the spacers have lower portions with a width greater than a width of the upper portion of the spacers.

18. The method of claim 13 , wherein the carbon-containing layer includes a material of C x H y .

19. The method of claim 13 , wherein the carbon-containing layer is formed by a deposition process including CVD, PECVD, or plasma doping technique.

20. A method for fabricating a semiconductor device, comprising:

forming a gate stack over a surface of a substrate;

forming a first recess cavity in the surface of the substrate and adjacent the gate stack;

forming a spacer layer over the gate stack and the substrate;

removing a portion of the spacer layer to form spacers adjoining opposite sidewalls of the gate stack, wherein the respective spacers have an upper portion with a first width and a lower portion with a second width, the first width being less than the second width;

forming a non-conformal layer adjoining an exterior surface of the spacers, wherein the non-conformal layer has an upper portion with a third width and a lower portion with a fourth width, the third width being greater than the fourth width;

removing the lower portion of the non-conformal layer to expose respective lower portions of the spacers, while leaving an upper portion of the non-conformal layer to protect the respective upper portions of the spacers;

removing at least a portion of respective lower portions of the spacers, while leaving the upper portion of the spacers to form a second recess cavity vertically between the substrate and the upper portion spacers;

removing the remaining upper portion of the non-conformal layer; and

forming an epitaxial material in the first recess cavity and the second recess cavity.