Interposer configuration with thermally isolated regions for temperature-sensitive opto-electronic components
View Patent ↗An interposer (support substrate) for an opto-electronic assembly is formed to include a thermally-isolated region where temperature-sensitive devices (such as, for example, laser diodes) may be positioned and operate independent of temperature fluctuations in other areas of the assembly. The thermal isolation is achieved by forming a boundary of dielectric material through the thickness of the interposer, the periphery of the dielectric defining the boundary between the thermally isolated region and the remainder of the assembly. A thermo-electric cooler can be used in conjunction with the temperature-sensitive device(s) to stabilize the operation of these devices.
1. An arrangement for supporting components of an opto-electronic assembly, comprising:
an interposer substrate for supporting a plurality of opto-electronic components that includes at least one temperature-sensitive opto-electronic component, the interposer substrate including a dielectric boundary strip formed through a thickness thereof and configured to define a thermally-isolated region of the interposer substrate that is thermally isolated from a remainder of the opto-electronic assembly, with the at least one temperature-sensitive opto-electronic component located within the thermally-isolated region.
2. The arrangement as defined in claim 1 , wherein the interposer substrate comprises silicon.
3. The arrangement as defined in claim 2 , wherein the dielectric boundary strip comprises silicon dioxide.
4. The arrangement as defined in claim 1 , wherein the interposer substrate comprises a glass material.
5. The arrangement as defined in claim 1 , wherein the arrangement further comprises a thermo-electric cooler element disposed in the thermally-isolated region with the at least one temperature-sensitive opto-electronic component.
6. The arrangement as defined in claim 5 , wherein the thermo-electric cooler element is disposed above and coupled to the at least one temperature-sensitive opto-electronic component.
7. The arrangement as defined in claim 5 , wherein the thermo-electric cooler element is disposed below the interposer substrate and is coupled to the at least one temperature-sensitive opto-electronic component by a conductive through-via formed within the interposer substrate.
8. The arrangement as defined in claim 1 , wherein the at least one temperature-sensitive opto-electronic component comprises at least one laser diode.
9. The arrangement as defined in claim 8 , wherein the at least one laser diode comprises an array of laser diodes.
10. The arrangement as defined in claim 1 , wherein the at least one temperature-sensitive opto-electronic component is at least one light-emitting diode.
11. An opto-electronic assembly, comprising:
a plurality of optical components, including at least one temperature-sensitive opto-electronic component;
a plurality of electrical components; and
an interposer substrate for supporting and interconnecting the plurality of optical components and the plurality of electrical components, the interposer substrate including a plurality of conductive through-vias for supplying electrical connections to other components remotely located from the interposer substrate,
wherein the interposer substrate comprises a dielectric boundary strip formed through the thickness thereof and configured to define a thermally-isolated region of the interposer substrate that is thermally isolated from a remainder of the opto-electronic assembly, with the at least one temperature-sensitive opto-electronic component located within the thermally-isolated region.
12. The opto-electronic assembly of claim 11 , wherein the plurality of optical components comprises at least one temperature-sensitive laser diode.
13. The opto-electronic assembly of claim 11 , wherein the interposer substrate comprises a silicon substrate, with the dielectric boundary strip comprising a strip of silicon dioxide disposed within a designated area of the silicon substrate.
14. The opto-electronic assembly of claim 11 , wherein the assembly further comprises a thermo-electric cooler element disposed within the thermally-isolated region and used to monitor and control the operating temperature of the at least one temperature-sensitive opto-electronic device.
15. The opto-electronic assembly of claim 14 , wherein the assembly further comprises a lid element disposed over and attached to the interposer substrate, the lid element including an opening in an area above the thermo-electric cooler element.
16. The opto-electronic assembly as defined in claim 15 , wherein the lid element further comprises a heat sink component disposed in the opening and contacting the thermo-electric cooler element.
17. A thermally-isolated interposer for an opto-electronic assembly, comprising:
an interposer substrate for supporting optical and electrical components, including at least one temperature-sensitive opto-electronic device; and
at least one dielectric boundary strip integrated within a portion of the interposer substrate, the at least one dielectric boundary strip formed through a thickness of the interposer substrate and having a topology defined to create a thermally-isolated region for placement of the at least one temperature-sensitive opto-electronic device.
18. The thermally-isolated interposer as defined in claim 17 , wherein the interposer substrate comprises a glass material.
19. The thermally-isolated interposer as defined in claim 17 , wherein the interposer substrate comprises silicon and the at least one dielectric boundary strip comprises silicon dioxide.
20. The thermally-isolated interposer as defined in claim 19 , wherein the at least one dielectric boundary strip comprises a plurality of dielectric boundary strips, formed at separate locations across a surface of the interposer substrate, with a separate temperature-sensitive opto-electronic device disposed within each thermally-isolated region created by each dielectric boundary strip of the plurality of dielectric boundary strips.