IP Library Granted Patent US 9,292,073
Granted Patent B2
US 9,292,073 · App. 13/688,941 · Granted Mar 22, 2016

Power management using relative energy break-even time

Inventors: Ren Wang (Portland, OR); Christian Maciocco (Portland, OR); Jr-Shian Tsai (Portland, OR); Rajeev D. Muralidhar (Bangalore, IN); Harinarayanan Seshadri (Bangalore, IN); Tsung-Yuan Tai (Portland, OR); Mesut A. Ergin (Hillsboro, OR); Alexander W. Min (Portland, OR)
Assignee: Intel Corporation
G06F1/3234G06F1/3206G06F1/3209G06F1/3228G06F1/32G06F1/3203
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Quick Facts
Patent No.
US 9,292,073
App. No.
13/688,941
Granted
Mar 22, 2016
Kind
B2
Abstract

Systems and methods may provide for determining an absolute energy break-even time for a first low power state with respect to a current state of a system. A relative energy break-even time may also be determined for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time. In addition, an operating state may be selected for the system based on at least in part the relative energy break-even time.

Claims (56)

1. A computer implemented method comprising:

determining an absolute energy break-even time for a first low power state with respect to a current state of a system;

determining a relative energy break-even time for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time; and

selecting an operating state for the system based on at least in part the relative energy break-even time.

2. The method of claim 1 , further including using a power consumption associated with the first low power state and a power consumption associated with the second low power state to determine the relative energy break-even time.

3. The method of claim 1 , wherein the second low power state is shallower and has a shorter exit latency than the first low power state.

4. The method of claim 3 , further including selecting the second low power state as the operating state if a projected idleness duration is less than the relative energy break-even time for the first low power state.

5. The method of claim 4 , wherein the projected idleness duration is greater than the absolute energy break-even time for the first low power state.

6. The method of claim 1 , further including:

detecting a first break event from a first event source;

detecting a second break event from a second event source; and

coordinating issuance of the first and second break events to the system based on at least in part the relative energy break-even time.

7. The method of claim 6 , wherein coordination of the issuance of the first and second break events includes a determination of a holding time based on at least in part the relative energy break-even time, and a deference of at least one of the first and second break events based on at least in part the holding time.

8. A non-transitory computer readable storage medium comprising a set of instructions which, if executed by a processor, cause a computer to:

determine an absolute energy break-even time for a first low power state with respect to a current state of a system;

determine a relative energy break-even time for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time; and

select an operating state for the system based on at least in part the relative energy break-even time.

9. The medium of claim 8 , wherein the instructions, if executed, cause a computer to further use a power consumption associated with the first low power state and a power consumption associated with the second low power state to determine the relative energy break-even time.

10. The medium of claim 8 , wherein the second low power state is to be shallower and is to have a shorter exit latency than the first low power state.

11. The medium of claim 10 , wherein the instructions, if executed, cause a computer to select the second low power state as the operating state if a projected idleness duration is less than the relative energy break-even time for the first low power state.

12. The medium of claim 11 , wherein the projected idleness duration is to be greater than the absolute energy break-even time for the first low power state.

13. The medium of claim 8 , wherein the instructions, if executed, cause a computer to:

detect a first break event from a first event source;

detect a second break event from a second event source; and

coordinate issuance of the first and second break events to the system based on at least in part the relative energy break-even time.

14. The medium of claim 13 , wherein coordination of the issuance of the first and second break events is to include a determination of a holding time based on at least in part the relative energy break-even time, and a deference of at least one of the first and second break events based on at least in part the holding time.

15. An apparatus comprising:

logic to,

determine an absolute energy break-even time for a first low power state with respect to a current state of a system,

determine a relative energy break-even time for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time, and

select an operating state for the system based on at least in part the relative energy break-even time.

16. The apparatus of claim 15 , wherein the logic is to further use a power consumption associated with the first low power state and a power consumption associated with the second low power state to determine the relative energy break-even time.

17. The apparatus of claim 15 , wherein the second low power state is to be shallower and is to have a shorter exit latency than the first low power state.

18. The apparatus of claim 17 , wherein the logic is to select the second low power state as the operating state if a projected idleness duration is less than the relative energy break-even time for the first low power state.

19. The apparatus of claim 18 , wherein the projected idleness duration is to be greater than the absolute energy break-even time for the first low power state.

20. The apparatus of claim 15 , wherein the logic is to,

detect a first break event from a first event source,

detect a second break event from a second event source, and

coordinate issuance of the first and second break events to the system based on at least in part the relative energy break-even time.

21. The apparatus of claim 20 , wherein coordination of the issuance of the first and second break events is to include a determination of a holding time based on at least in part the relative energy break-even time, and a deference of at least one of the first and second break events based on at least in part the holding time.

22. The apparatus of claim 15 , wherein the first and second low power states are to include at least one of a platform state, a processor state and a device state.

23. A platform comprising:

a processor; and

logic to,

determine an absolute energy break-even time for a first low power state with respect to a current state of the processor,

determine a relative energy break-even time for the first low power state with respect to a second low power state based on at least in part the absolute energy break-even time, and

select an operating state for the processor based on at least in part the relative energy break-even time.

24. The platform of claim 23 , wherein the logic is to further use a power consumption associated with the first low power state and a power consumption associated with the second low power state to determine the relative energy break-even time.

25. The platform of claim 23 , wherein the second low power state is to be shallower and is to have a shorter exit latency than the first low power state.

26. The platform of claim 25 , wherein the logic is to select the second low power state as the operating state if a projected idleness duration is less than the relative energy break-even time for the first low power state.

27. The platform of claim 26 , wherein the projected idleness duration is to be greater than the absolute energy break-even time for the first low power state.

28. The platform of claim 23 , wherein the logic is to,

detect a first break event from a first event source,

detect a second break event from a second event source, and

coordinate issuance of the first and second break events to the processor based on at least in part the relative energy break-even time.

29. The platform of claim 28 , wherein coordination of the issuance of the first and second break events is to include a determination of a holding time based on at least in part the relative energy break-even time, and a deference of at least one of the first and second break events based on at least in part the holding time.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2013
From: WANG, REN; MACIOCCO, CHRISTIAN; TSAI, JR-SHIAN; SESHADRI, HARINARAYANAN; TAI, TSUNG-YUAN; ERGIN, MESUT A.; MIN, ALEXANDER
To: INTEL CORPORATION
Reel/Frame 030573/0195 →
Priority Claims (1)
IN 3434/DEL/2011 · Nov 29, 2011 · national
Continuity (1)
Related Publication 20130138985A1 · May 30, 2013