IP Library Granted Patent US 8,937,507
Granted Patent B2
US 8,937,507 · App. 13/695,531 · Granted Jan 20, 2015

Self oscillating modulator

Inventors: Rémy Cellier (Lyons, FR); Gaël Pillonnet (Brignais, FR)
Assignee: ST-Ericsson SA
H03F3/2178H03F3/217H03F3/68
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Quick Facts
Patent No.
US 8,937,507
App. No.
13/695,531
Granted
Jan 20, 2015
Kind
B2
Abstract

There is described a self oscillating modulator circuit comprising at least two coupled self oscillating loop modules, that achieved a good efficiency and a good linearity.

Claims (37)

1. A self-oscillating modulator circuit comprising:

at least two class D self-oscillating loop modules, each module comprising an hysteresis comparator, and each module being configured for receiving a respective input signal and outputting a respective two-level signal;

coupling means connecting said at least two class D self-oscillating loop modules, ahead of the hysteresis comparator of each module, for synchronizing said at least two class D self-oscillating loop modules; and

summing means for summing the respective output signals of each of said at least two class D self-oscillating loop modules and for outputting a multi-level modulated output signal.

2. The circuit according to claim 1 , wherein each of the at least two class D self-oscillating loop modules comprise:

an integrator module, the output of which is connected to the hysteresis comparator;

a class D amplifier, the input of which is connected to the output of the hysteresis comparator; and

a comparator for comparing the input signal of the class D self-oscillating loop module with the output of the class D amplifier, the output of the comparator being connected to the input of the integrator module.

3. The circuit according to claim 1 , wherein the coupling means comprises:

a voltage divider connected between the respective inputs of the hysteresis comparators of the class D self-oscillating loop modules, for coupling said modules.

4. The circuit according to claim 1 ,

wherein said at least two class D self-oscillating loop modules are configured for receiving respective input signals being in phase opposition.

5. An audio amplifier comprising a circuit according to claim 1 .

6. An audio device comprising the audio amplifier according to claim 5 .

7. A method of generating a multi-level modulated output signal in a self-oscillating modulator circuit, the method comprising:

outputting from at least two class D self-oscillating loop modules comprising an hysteresis comparator, respective two-level signals from respective input signals,

coupling said at least two class D self-oscillating loop modules, ahead of the hysteresis comparator of each module, for synchronizing said at least two class D self-oscillating loop modules, and

summing the respective output signals of each of said at least two class D self-oscillating loop modules; and

outputting a multi-level modulated output signal.

8. The method according to claim 7 , wherein each of the at least two class D self-oscillating loop modules comprise an integrator module, the output of which is connected to the hysteresis comparator, and a class D amplifier, the input of which is connected to the output of the hysteresis comparator, the method further comprising:

comparing the input signal of the class D self-oscillating loop module with the output of the class D amplifier, the output of the comparator being connected to the input of the integrator module.

9. The method according to claim 7 , further comprising:

coupling said at least two class D self-oscillating loop modules by a voltage divider which is connected between the respective inputs of the hysteresis comparators of the class D self-oscillating loop modules.

10. The method according to claim 7 , further comprising:

receiving said respective input signals in phase opposition.

11. A self-oscillating modulator circuit comprising:

at least two class D self-oscillating loop modules, each module comprising an hysteresis comparator, and each module being configured to receive a respective input signal and to output a respective two-level signal;

a coupling element which connects said at least two class D self-oscillating loop modules, ahead of the hysteresis comparator of each module, for synchronizing said at least two class D self-oscillating loop modules, and

a summer for summing the respective output signals of each of said at least two class D self-oscillating loop modules and for outputting a multi-level modulated output signal.

12. The circuit according to claim 11 , wherein each of the at least two class D self-oscillating loop modules comprise:

an integrator module, the output of which is connected to the hysteresis comparator;

a class D amplifier, the input of which is connected to the output of the hysteresis comparator; and

a comparator for comparing the input signal of the class D self-oscillating loop module with the output of the class D amplifier, the output of the comparator being connected to the input of the integrator module.

13. The circuit according to claim 11 , wherein said coupling element comprises:

a voltage divider connected between the respective inputs of the hysteresis comparators of the class D self-oscillating loop modules, for coupling said modules.

14. The circuit according to claim 11 ,

wherein each of said at least two class D self-oscillating loop modules are configured for receiving respective input signals being in phase opposition.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 7, 2019
From: OPTIS CIRCUIT TECHNOLOGY, LLC,
To: TELEFONAKTIEBOLAGET L M ERICSSON (PUBL)
Reel/Frame 048529/0510 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2019
From: ST-ERICSSON SA, EN LIQUIDATION
To: OPTIS CIRCUIT TECHNOLOGY, LLC,
Reel/Frame 048504/0519 →
STATUS CHANGE-ENTITY IN LIQUIDATION Recorded Feb 2, 2016
From: ST-ERICSSON SA
To: ST-ERICSSON SA, EN LIQUIDATION
Reel/Frame 037739/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2014
From: CELLIER, REMY; PILLONNET, GAEL
To: ST-ERICSSON SA
Reel/Frame 033944/0845 →
Priority Claims (1)
EP 10305550 · May 25, 2010 · regional
Continuity (2)
Provisional Application 61387663 · Sep 29, 2010
Related Publication 20130049856A1 · Feb 28, 2013